PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 173

• Manufacturer Part Number: PIC18F25K80
• Manufacturer: MICROCHIP [Microchip Technology]

10.5
The RCON register contains bits used to determine the
cause of the last Reset or wake-up from Idle or Sleep
modes. RCON also contains the bit that enables
interrupt priorities (IPEN).
REGISTER 10-19: RCON: RESET CONTROL REGISTER
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
IPEN
RCON Register
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
SBOREN: Software BOR Enable bit
For details of bit operation, see
CM: Configuration Mismatch Flag bit
1 = A Configuration Mismatch Reset has not occurred
0 = A Configuration Mismatch Reset has occurred (must be subsequently set in software)
RI: RESET Instruction Flag bit
For details of bit operation, see
TO: Watchdog Timer Time-out Flag bit
For details of bit operation, see
PD: Power-Down Detection Flag bit
For details of bit operation, see
POR: Power-on Reset Status bit
For details of bit operation, see
BOR: Brown-out Reset Status bit
For details of bit operation, see
SBOREN
R/W-1
W = Writable bit
‘1’ = Bit is set
R/W-1
CM
Register
Register
Register
Register
Register
Register
R/W-1
RI
Preliminary
5-1.
5-1.
5-1.
5-1.
5-1.
5-1.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
R-1
TO
R-1
PD
x = Bit is unknown
R/W-0
POR
DS39977C-page 173
R/W-0
BOR
bit 0