PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 463

• Manufacturer Part Number: PIC18F25K80
• Manufacturer: MICROCHIP [Microchip Technology]

REGISTER 28-1:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-3
bit 2
bit 1
bit 0
U-0
—
Unimplemented: Read as ‘ 0 ’
XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode are enabled
0 = Instruction set extension and Indexed Addressing mode are disabled (Legacy mode)
Unimplemented: Read as ‘ 0 ’
SOSCSEL<1:0>: SOSC Power Selection and Mode Configuration bits
11 = High-power SOSC circuit is selected
10 = Digital (SCLKI) mode; I/O port functionality of RC0 and RC1 is enabled
01 = Low-power SOSC circuit is selected
00 = Reserved
INTOSCSEL: LF-INTOSC Low-power Enable bit
1 = LF-INTOSC in High-Power mode during Sleep
0 = LF-INTOSC in Low-Power mode during Sleep
Unimplemented: Read as ‘ 0 ’
RETEN: V
1 = Ultra low-power regulator is disabled. Regulator power in Sleep mode is controlled by REGSLP
0 = Ultra low-power regulator is enabled. Regulator power in Sleep mode is controlled by SRETEN
XINST
R/P-1
(WDTCON<7>).
(WDTCON<4>).
CONFIG1L: CONFIGURATION REGISTER 1 LOW (BYTE ADDRESS 300000h)
REG
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
Sleep Enable bit
U-0
—
SOSCSEL1 SOSCSEL0
R/P-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
R/P-1
INTOSCSEL
R/P-1
x = Bit is unknown
U-0
—
DS39977C-page 463
RETEN
R/P-1
bit 0