PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 172

• Manufacturer Part Number: PIC18F25K80
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F66K80 FAMILY
REGISTER 10-18: IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5
DS39977C-page 172
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-1
IRXIP
IRXIP: Invalid Message Received Interrupt Priority bits
1 = High priority
0 = Low priority
WAKIP: Bus Wake Up Activity Interrupt Priority bit
1 = High priority
0 = Low priority
1 = High priority
0 = Low priority
TXB2IP: Transmit Buffer 2 Interrupt Priority bit
1 = High priority
0 = Low priority
TXB1IP: Transmit Buffer 1 Interrupt Priority bit
1 = High priority
0 = Low priority
TXB0IP: Transmit Buffer 0 Interrupt Priority bit
1 = High priority
0 = Low priority
RXB1IP: Receive Buffer 1 Interrupt Priority bit
Mode 0:
1 = High priority for Receive Buffer 1
0 = Low priority for Receive Buffer 1
Modes 1 and 2:
1 = High priority for received messages
0 = Low priority for received messages
RXB0IP/FIFOFIP: Receive Buffer 0 Interrupt Priority bit
Mode 0:
1 = High priority for Receive Buffer 0
0 = Low priority for Receive Buffer 0
Mode 1:
Unimplemented: Read as ‘ 0 ’
Mode 2:
FIFOFIE: FIFO Full Interrupt Flag bit
1 = High priority
0 = Low priority
ERRIP: CAN Bus Error Interrupt Priority bit
WAKIP
R/W-1
W = Writable bit
‘1’ = Bit is set
ERRIP
R/W-1
TXB2IP
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TXB1IP
R/W-1
TXB0IP
R/W-1
 2011 Microchip Technology Inc.
x = Bit is unknown
RXB1IP
R/W-1
RXB0IP/
FIFOFIE
R/W-1
bit 0