PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 367

• Manufacturer Part Number: PIC18F25K80
• Manufacturer: MICROCHIP [Microchip Technology]

23.2.2
The ADRESH:ADRESL register pair is where the 12-bit
A/D result and extended sign bits (ADSGN) are loaded
at the completion of a conversion. This register pair is
16 bits wide. The A/D module gives the flexibility of left
or right justifying the 12-bit result in the 16-bit result
register. The A/D Format Select bit (ADFM) controls
this justification.
FIGURE 23-3:
REGISTER 23-4:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
ADRES11
R/W-x
Result bits
A/D RESULT REGISTERS
ADRES<11:4>: A/D Result High Byte bits
ADRES10
R/W-x
A/D RESULT JUSTIFICATION
Left Justified
ADRESH: A/D RESULT HIGH BYTE REGISTER, LEFT JUSTIFIED (ADFM = 0)
ADFM = 0
ADSGN bits
ADRESH
W = Writable bit
‘1’ = Bit is set
ADRES9
R/W-x
ADRESL
ADRES8
R/W-x
Preliminary
12-Bit Result
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
ADRES7
R/W-x
Figure 23-3
fication and location of the extended sign bits
(ADSGN). The extended sign bits allow for easier
16-bit math to be performed on the result.
When the A/D Converter is disabled, these 8-bit
registers can be used as two, general purpose registers.
ADRESH
shows the operation of the A/D result justi-
ADRES6
R/W-x
x = Bit is unknown
ADRES5
R/W-x
ADRESL
Right Justified
ADFM = 1
DS39977C-page 367
2010 _18_0001
ADRES4
R/W-x