SC16IS740IPW PHILIPS [NXP Semiconductors], SC16IS740IPW Datasheet - Page 7

• Manufacturer Part Number: SC16IS740IPW
• Description: Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
Table 2.
SC16IS740_750_760_5
Product data sheet
Symbol
CTS
TX
RX
RESET
XTAL1
XTAL2
V
I2C/SPI
Fig 7. Pin configuration for HVQFN24
DD
a. I
index area
terminal 1
2
C-bus interface
RESET
XTAL1
XTAL2
Pin description
V
I2C
Pin
TSSOP16 TSSOP24 HVQFN24
11
12
13
14
15
16
1
8
DD
A0
6.2 Pin description
1
2
3
4
5
6
Transparent top view
SC16IS750IBS
SC16IS760IBS
1
2
3
4
5
6
7
8
22
23
24
1
2
3
4
5
18
17
16
15
14
13
002aab015
GPIO5/DTR
GPIO4/DSR
V
GPIO3
GPIO2
GPIO1
SS
Rev. 05 — 16 November 2006
Single UART with I
Type Description
I
O
I
I
I
O
-
I
UART clear to send (active LOW). A logic 0 (LOW) on the CTS
pin indicates the modem or data set is ready to accept transmit
data from the SC16IS740/750/760. Status can be tested by
reading MSR[4]. This pin only affects the transmit and receive
operations when auto CTS function is enabled via the Enhanced
Feature Register EFR[7] for hardware flow control operation.
UART transmitter output. During the local Loopback mode, the
TX output pin is disabled and TX data is internally connected to
the UART RX input.
UART receiver input. During the local Loopback mode, the RX
input pin is disabled and TX data is connected to the UART RX
input internally.
device hardware reset (active LOW)
Crystal input or external clock input. Functions as a crystal input
or as an external clock input. A crystal can be connected
between XTAL1 and XTAL2 to form an internal oscillator circuit
(see
connected to this pin.
Crystal output or clock output. (See also XTAL1.) XTAL2 is used
as a crystal oscillator output.
power supply
I
this pin is at logic HIGH. SPI interface is selected if this pin is at
logic LOW.
2
C-bus or SPI interface select. I
Figure
b. SPI interface
index area
terminal 1
2
15). Alternatively, an external clock can be
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
RESET
XTAL1
XTAL2
V
SPI
CS
DD
SC16IS740/750/760
1
2
3
4
5
6
Transparent top view
SC16IS750IBS
SC16IS760IBS
2
C-bus interface is selected if
[1]
18
17
16
15
14
13
© NXP B.V. 2006. All rights reserved.
002aab401
GPIO5/DTR
GPIO4/DSR
V
GPIO3
GPIO2
GPIO1
SS
7 of 62