SC16IS740IPW PHILIPS [NXP Semiconductors], SC16IS740IPW Datasheet - Page 27

• Manufacturer Part Number: SC16IS740IPW
• Description: Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
SC16IS740_750_760_5
Product data sheet
8.6 Modem Control Register (MCR)
The MCR controls the interface with the mode, data set, or peripheral device that is
emulating the modem.
Table 17.
[1]
[2]
Bit
7
6
5
4
3
2
1
0
MCR[7:5] and MCR[2] can only be modified when EFR[4] is set, that is, EFR[4] is a write enable.
Only available on SC16IS750/SC16IS760.
Symbol
MCR[7]
MCR[6]
MCR[5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
[1]
[1]
[1]
Rev. 05 — 16 November 2006
Single UART with I
Table 17
Description
clock divisor
IrDA mode enable
Xon Any
enable loopback
reserved
TCR and TLR enable
RTS
DTR
register bit 1, the state of DTR pin can be controlled as below. Writing to
IOState bit 5 will not have any effect on this pin.
logic 0 = divide-by-1 clock input
logic 1 = divide-by-4 clock input
logic 0 = normal UART mode
logic 1 = IrDA mode
logic 0 = disable Xon Any function
logic 1 = enable Xon Any function
logic 0 = normal operating mode
logic 1 = enable local Loopback mode (internal). In this mode the
MCR[1:0] signals are looped back into MSR[4:5] and the TX output is
looped back to the RX input internally.
logic 0 = disable the TCR and TLR register.
logic 1 = enable the TCR and TLR register.
logic 0 = force RTS output to inactive (HIGH)
logic 1 = force RTS output to active (LOW). In Loopback mode,
controls MSR[4]. If Auto RTS is enabled, the RTS output is controlled
by hardware flow control.
logic 0 = Force DTR output to inactive (HIGH)
logic 1 = Force DTR output to active (LOW)
[2]
. If GPIO5 is selected as DTR modem pin through IOControl
shows the Modem Control Register bit settings.
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
SC16IS740/750/760
© NXP B.V. 2006. All rights reserved.
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