SC16IS740IPW PHILIPS [NXP Semiconductors], SC16IS740IPW Datasheet - Page 41

• Manufacturer Part Number: SC16IS740IPW
• Description: Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
SC16IS740_750_760_5
Product data sheet
10.3 Addressing
10.4 Use of subaddresses
Before any data is transmitted or received, the master must send the address of the
receiver via the SDA line. The first byte after the START condition carries the address of
the slave device and the read/write bit.
address can be selected by using A1 and A0 pins. For example, if these 2 pins are
connected to V
communicates with it through this address.
Table 32.
[1]
the byte following the slave address byte. This subaddress is the internal address of the
word the master wants to access for a single byte transfer, or the beginning of a sequence
of locations for a multi-byte transfer. A subaddress is an 8-bit byte. Unlike the device
address, it does not contain a direction (R/W) bit, and like any byte transferred on the bus
it must be followed by an acknowledge.
Table 33
used, bits [2:1] are both set to zeroes, bits [6:3] are used to select one of the device’s
internal registers, and bit 7 is not used.
A register write cycle is shown in
byte with the direction bit set to ‘write’, a subaddress byte, a number of data bytes, and a
STOP signal. The subaddress indicates which register the master wants to access, and
the data bytes which follow will be written one after the other to the subaddress location.
A1
V
V
V
V
V
V
V
V
SCL
SCL
SCL
SCL
SDA
SDA
SDA
SDA
When a master communicates with the SC16IS740/750/760 it must send a subaddress in
DD
DD
DD
DD
SS
SS
SS
SS
X = logic 0 for write cycle; X = logic 1 for read cycle.
shows the breakdown of the subaddress (register address) byte. Bit 0 is not
SC16IS740/750/760 address map
A0
V
V
SCL
SDA
V
V
SCL
SDA
V
V
SCL
SDA
V
V
SCL
SDA
DD
SS
DD
SS
DD
SS
DD
SS
DD
, then the SC16IS740/750/760’s address is set to 0x90, and the master
Rev. 05 — 16 November 2006
Single UART with I
0x90 (1001 000X)
0x92 (1001 001X)
0x98 (1001 100X)
0x9A (1001 101X)
0xA0 (1010 000X)
0xA2 (1010 001X)
0xA8 (1010 100X)
0xAA (1010 101X)
0x94 (1001 010X)
0x96 (1001 011X)
0x9C (1001 110X)
0x9E (1001 111X)
0xA4 (1010 010X)
0xA6 (1010 011X)
0xAC (1010 110X)
0xAE (1010 111X)
SC16IS750/760 I
Figure
Table 32
2
C addresses (hex)
22. The START is followed by a slave address
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
shows how the SC16IS740/750/760’s
SC16IS740/750/760
[1]
© NXP B.V. 2006. All rights reserved.
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