CYNSE10128-083FGCI CYPRESS [Cypress Semiconductor], CYNSE10128-083FGCI Datasheet - Page 67

• Manufacturer Part Number: CYNSE10128-083FGCI
• Manufacturer: CYPRESS [Cypress Semiconductor]

The MultiSearch Enable (MSE) bit in the Command Register must be set HIGH when the Command Register is programmed.
The same with the Enhanced Mode (EMODE) bit. The following are the rest of the parameters programmed into the eight devices.
For a single-device configuration, the parameters are the same as device 7. BHI[2:0] and LHI[6:0] should be tied to ground.
The following three figures show the response of 3 of the 8 devices having a hit at different time according to a Hit/Miss assumption
shown below in Table 6-7. For these timing diagrams, five 72-bit searches are performed sequentially. Figure 6-15 shows the
timing diagram for a Search command in the 72-bit-configured table of eight devices for device number 0. Figure 6-16 and
Figure 6-17 shows the same for device number 1 and number 7 (the last device in this specific table) respectively.
Table 6-7. Hit/Miss Assumption for MultiSearch Mode
Document #: 38-02069 Rev. *F
• LHI_1_L signals are active LOW while LHI_0 are active HIGH.
• First seven devices (devices 0–6): NES = 00 (binary) for each block in each device, TLSZ = 01 (binary), HLAT = 001 (binary),
• Eighth device (device 7): NES = 00 (binary) for each block in each device, TLSZ = 01 (binary), HLAT = 001 (binary), LRAM =
Search #
Device 0
Device 1
Device 7
Devices
LRAM = 0 (binary), and LDEV = 0 (binary).
1 (binary), and LDEV = 1 (binary).
2–6
Miss
Miss
Miss
Hit
1
Miss
Miss
Miss
Hit
Miss
Hit
Hit
Hit
2
CONFIDENTIAL
Miss
Miss
Miss
PRELIMINARY
Hit
Miss
Miss
Hit
Hit
3
Miss
Miss
Hit
Hit
Miss
Miss
Miss
Hit
4
Miss
Miss
Miss
Hit
CYNSE10512
CYNSE10256
CYNSE10128
Miss
Miss
Miss
Hit
Page 67 of 153
5
Miss
Miss
Miss
Hit
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