CYNSE10128-083FGCI CYPRESS [Cypress Semiconductor], CYNSE10128-083FGCI Datasheet - Page 6

• Manufacturer Part Number: CYNSE10128-083FGCI
• Manufacturer: CYPRESS [Cypress Semiconductor]

Figure 6-10. Timing Diagram for 72-bit Search Device Number 0......................................................... 62
Figure 6-11. Timing Diagram for 72-bit Search Device Number 1......................................................... 63
Figure 6-12. Timing Diagram for 72-bit Search Device Number 7 (Last Device) .................................. 64
Figure 6-13. ×72 Table with Eight Devices ............................................................................................ 65
Figure 6-14. Hardware Diagram for a Table with Eight Devices for MultiSearch .................................. 66
Figure 6-15. Timing Diagram for 72-bit MultiSearch Device Number 0 ................................................. 68
Figure 6-16. Timing Diagram for 72-bit MultiSearch Device Number 1 ................................................. 69
Figure 6-17. Timing Diagram for 72-bit MultiSearch Device Number 7 (Last Device) ........................... 70
Figure 6-18.
Figure 6-19. Hardware Diagram for a Table with 31 Devices ................................................................ 73
Figure 6-20. 144-bit Search for Devices in Block #0 and Above Block #1 Winning Device .................. 74
Figure 6-21. 144-bit Search Timing Diagram for Block #1 Global Winning Device ............................... 75
Figure 6-22. 144-bit Search Timing Diagram for Devices Below Block #1 Winning Device .................. 76
Figure 6-23. 144-bit Search Timing Diagram for Devices Above Block #2 Winning Device.................. 77
Figure 6-24. 144-bit Search Timing Diagram for Block #2 Global Winning Device ............................... 78
Figure 6-25. 144-bit Search Timing Diagram for Devices Below Block #2 Winning Device .................. 79
Figure 6-26. 144-bit Search Timing Diagram for Devices Above Block #3 Winning Device.................. 80
Figure 6-27. 144-bit Search Timing Diagram for Block #3 Global Winning Device ............................... 81
Figure 6-28. 144-bit Search Diagram Below Block #3 Winning Device Except the Last Device ........... 82
Figure 6-29. 144-bit Search Timing Diagram for Device Number 6 in Block #3 .................................... 83
Figure 6-30. ×144 Table with 31 Devices .............................................................................................. 84
Figure 6-31. Timing Diagram for 576-bit Single Search Device Number 0............................................ 86
Figure 6-32. Timing Diagram for 576-bit Single Search Device Number 1............................................ 87
Figure 6-33. Timing Diagram for 576-bit Single Search Device Number 7 (Last Device) ..................... 88
Figure 6-34. ×576 Table with Eight Devices .......................................................................................... 89
Figure 6-35. Timing Diagram for 576-bit MultiSearch Device Number 0 ............................................... 91
Figure 6-36. Timing Diagram for 576-bit MultiSearch Device Number 1 ............................................... 92
Figure 6-37. Timing Diagram for 576-bit MultiSearch Device Number 7 (Last Device) ......................... 93
Figure 6-38. ×576 Table with Eight Devices .......................................................................................... 94
Figure 6-39. Multiwidth Configurations Example with CYNSE10512s................................................... 95
Figure 6-40. Timing Diagram for Mixed Search for Devices Above Block 0 Winning Device ................ 96
Figure 6-41. Timing Diagram for Mixed Search for Block 0 Winning Device ......................................... 97
Figure 6-42. Timing Diagram for Mixed Search for Devices Below Block 0 Winning Device ................ 98
Figure 6-43. Timing Diagram for Mixed Search Above Block 1 Winning Device ................................... 99
Figure 6-44. Timing Diagram for Mixed Search for Block 1 Winning Device ....................................... 100
Figure 6-45. Timing Diagram for Mixed Search Below Block 1 Winning Device ................................. 101
Figure 6-46. Timing Diagram for Mixed Search Above Block 2 Winning Device ................................. 102
Figure 6-47. Timing Diagram for Mixed Search for Block 2 Winning Device ....................................... 103
Figure 6-48. Timing Diagram for Mixed Search Below Block 2 Winning Device ................................. 104
Figure 6-49. Timing Diagram for Mixed Search for All Except the Last Device in Block 3 .................. 105
Figure 6-50. Timing Diagram for Mixed Search for the Last Device in Block 3 ................................... 106
Figure 6-51. Multiwidth Configurations Example for MultiSearch with CYNSE10512s ....................... 107
Figure 6-52. Timing Diagram for Mixed MultiSearch (Eight Devices) for Device 0.............................. 109
Figure 6-53. Timing Diagram for Mixed MultiSearch (Eight Devices) for Device 1.............................. 110
Figure 6-54. Timing Diagram for Mixed MultiSearch (Eight Devices) for Device 2.............................. 111
Figure 6-55. Timing Diagram for Mixed MultiSearch (Eight Devices) for Device 7.............................. 112
Figure 6-56. Timing Diagram of 72-bit Learn from DQ Bus and CMPR Registers (One Device) ........ 114
Figure 6-57. Timing Diagram of 288-bit Learn from DQ Bus and CMPR Registers (One Device) ...... 115
Figure 6-58. Timing Diagram of 576-bit Learn from DQ Bus (One Device) ......................................... 116
Document #: 38-02069 Rev. *F
×
72 Table with in MultiSearchMode................................................................................... 71
LIST OF FIGURES
CONFIDENTIAL
PRELIMINARY
(continued)
CYNSE10512
CYNSE10256
CYNSE10128
Page 6 of 153
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