CYNSE10128-083FGCI CYPRESS [Cypress Semiconductor], CYNSE10128-083FGCI Datasheet - Page 61

• Manufacturer Part Number: CYNSE10128-083FGCI
• Manufacturer: CYPRESS [Cypress Semiconductor]

The following three figures show the response of three of the eight devices having a hit at different time according to a Hit/Miss
assumption shown below in Table 6-6. For these timing diagrams, four 72-bit searches are performed sequentially. Figure 6-10
shows the timing diagram for a Search command in the 72-bit-configured table of eight devices for device number 0. Figure 6-
11 and Figure 6-12 shows the same for device number 1 and number 7 (the last device in this specific table) respectively.
Note: All the shared signals showing tri-stated condition (“z”) indicate that, that particular device is not driving the shared signals.
The shared signals are not three-stated in a real life because other devices will be driving them.
Table 6-6. Hit/Miss Assumptions
Document #: 38-02069 Rev. *F
Search Number
DQ[71:0]
CMDV
CMD[10:0]
SSF, SSV
Devices 2–6
Device 0
Device 1
Device 7
BHI[2:0]
BHI[2:0]
BHI[2:0]
BHI[2:0]
BHI[2:0]
BHI[2:0]
BHI[2:0]
BHI[2:0]
LHO[1]
Figure 6-9. Hardware Diagram for a Table with Eight Devices
Miss
Miss
Miss
3
Hit
3
3
1
LHO[1]
2
2
2
LHI
LHI
LHO[1]
LHI
1
1
1
LHO[1]
CONFIDENTIAL
PRELIMINARY
0
0
0
Ayama 10000 #6
Ayama 10000 #4
Ayama 10000 #7
Ayama 10000 #2
Ayama 10000 #3
Ayama 10000 #5
Ayama 10000 #0
Ayama 10000 #1
LHO[0]
Miss
Miss
Miss
Hit
2
6
6
6
6
6
6
6
6
LHO[0]
LHI
LHI
5
5
5
5
5
5
5
5
LHI
LHO[0]
4
4
4
4
4
4
4
4
LHO[0]
LHI
LHI
LHI
LHI
LHI
LHO[1] LHO[0]
3
3
3
3
3
LHO[0]
2
2
2
2
2
LHO[0]
Miss
1
1
1
Hit
Hit
Hit
1
1
3
LHO[0]
BHO[0]
BHO[1]
BHO[2]
0
0
0
0
0
BHO[0]
BHO[1]
BHO[2]
CYNSE10512
CYNSE10256
CYNSE10128
SRAM
Page 61 of 153
Miss
Miss
Miss
Hit
4
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