cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 71
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cn8223
Manufacturer Part Number
cn8223
Description
Atm Transmitter/receiver With Utopia Interface
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8223.pdf
(161 pages)
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CN8223
ATM Transmitter/Receiver with UTOPIA Interface
2.7.1 FIFO Interface Inputs and Outputs
100046D
2.7 FIFO Port/UTOPIA Interface
The CN8223 has four bidirectional FIFO ports used to interface to the ATM layer
outside the chip. These four ports share FDAT_IN and FDAT_OUT 8-bit ports.
Each port has its own set of six control signals used for flow control and timing.
(Refer to
to other UTOPIA components. When UTOPIA mode is enabled, Ports 1, 2, and 3
are unused. The UTOPIA interface is detailed in
The four-port FIFO interface allows the connection of the CN8223 directly to
dual-port RAMs, FIFO RAMs, and other similar circuits. The FIFO interface pins
and their functions used for connection are listed in
port timing for the 53-octet mode is shown in
of the transmit FIFO pin functions are given in
timing for the 53-octet mode is shown in
receive FIFO pin functions are given in
Table 2-23. FIFO Interface Pin Connections (1 of 2)
FDAT_IN[8:0]
FCTRL_IN[0]
FCTRL_IN[1]
FCTRL_IN[2]
FCTRL_IN[3]
FCTRL_IN[4]
FCTRL_IN[5]
FCTRL_IN[6]
FCTRL_IN[7]
FDAT_OUT[8:0]
FCTRL_OUT[0]
FCTRL_OUT[1]
FCTRL_OUT[2]
FCTRL_OUT[3]
FCTRL_OUT[4]
FCTRL_OUT[5]
FCTRL_OUT[6]
Port 0 can be configured as a level 1 compliant UTOPIA port for connection
CN8223
Figure
1-4, for a diagram of the FIFO port/UTOPIA interface.)
Conexant
Transmit Data with Parity
Port 0 Transmit Data FIFO Empty
Port 1 Transmit Data FIFO Empty
Port 2 Transmit Data FIFO Empty
Port 3 Transmit Data FIFO Empty
Port 0 Receive Data FIFO Full
Port 1 Receive Data FIFO Full
Port 2 Receive Data FIFO Full
Port 3 Receive Data FIFO Full
Receive Data with Parity
Port 0 Receive Data Write Strobe
Port 1 Receive Data Write Strobe
Port 2 Receive Data Write Strobe
Port 3 Receive Data Write Strobe
Port 0 Receive Cell Invalid Indication
Port 1 Receive Cell Invalid Indication
Port 2 Receive Cell Invalid Indication
Table
Figure
2-25.
Figure
Table
2-17. Detailed descriptions of the
Function
Section
Table
2-16. Detailed descriptions
2-24. Receive FIFO port
2.7 FIFO Port/UTOPIA Interface
2.0 Functional Description
2.7.5.
2-23. Transmit FIFO
2-37
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