cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 37

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cn8223

Manufacturer Part Number
cn8223
Description
Atm Transmitter/receiver With Utopia Interface
Manufacturer
Mindspeed Technologies
Datasheet

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CN8223
ATM Transmitter/Receiver with UTOPIA Interface
Table 2-1. Valid CONFIG_1 Line Mode Settings, Bits 7–0
100046D
DS1
DS1 (externally gapped 192 bits/frame)
E1
E1 (externally gapped TS0 and TS16)
DS3, internal framer
DS3, external framer
DS3, external framer (gapped 84/85 bits)
E3, internal G.751 format
E3, external G.751 format
E3, external G.751 format (gapped first 16
bits)
E3, internal G.832 format
E4, internal G.832 format
STS-1, internal framer
STS-3c/STM-1, internal framer
Parallel or TAXI interface, 53 octet cells
NOTE(S):
Type of Line Input Signal
x = Don’t Care.
2.2 Line Framers
This section describes the operation and control of the internal framers for DS3,
E3 (both G.751 and G.832), E4 (G.832), STS-1, and STS-3c/STM-1 formatted
serial streams. The transmit and receive serial interfaces can operate at up to
155 MHz. Detailed timing information for the line interface is given in
Chapter
and provides cell octets to the HEC/PLCP cell alignment block. All alarm and
error conditions are monitored and reported in status registers and event counters.
alignment block and adds line framing overhead information. All alarm and error
conditions can be generated from control registers.
illustrated in
receive in the CONFIG_1 register [0x00].
by CONFIG_1.
The framer receive circuitry recovers the frame location from the serial stream
The framer transmit circuitry receives cell octets from the HEC/PLCP cell
External interfaces to this block and the interface to the rest of the CN8223 are
4.0.
Table
Type
PHY
0
0
1
1
2
2
2
3
3
3
4
5
6
7
0
1-2. The CN8223 line mode is set for both transmit and
Conexant
Unframed
Input
0
1
0
1
0
0
1
0
0
1
x
x
x
x
x
Disable
B3ZS/
HDB3
0 or 1
0 or 1
0 or 1
0 or 1
0
0
0
0
0
0
0
1
1
0
0
Table 2-1
External
Framer
lists the valid line modes set
1
1
1
1
0
1
1
0
1
1
0
0
0
0
1
2.0 Functional Description
Interface
Parallel
Enable
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
2.2 Line Framers
Enable
0 or 1
0 or 1
0 or 1
0 or 1
Align
HEC
0
0
0
0
0
0
1
1
1
1
1
2-3

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