cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 57

• Manufacturer Part Number: cn8223
• Description: Atm Transmitter/receiver With Utopia Interface
• Manufacturer: Mindspeed Technologies

CN8223
ATM Transmitter/Receiver with UTOPIA Interface
2.5.2 Transmit Parallel Interface
100046D
for the TAXI chipset and the CN8223 are listed in
Table 2-14. Pin Connections between TAXI Chipset and CN8223
Interface connections for the Transmit Parallel Interface mode are listed in
Table
respectively.
TXCKI has a frequency of up to 20 MHz. In parallel mode, the synchronization
signal TXOD marks the octet clocks where the CN8223 does not provide a new
data octet on the TXDAT output. This could be used for marking all of the
overhead (non-ATM payload) octets in a data stream.
the external circuitry to the CN8223 on TXCKI. TXDAT is the output signal; it
transitions in response to the rising edge of TXCKI, and can be sampled on the
following falling edge externally. TXDELO also transitions in response to the
rising edge and marks the first octet of each 53-octet cell.
Table 2-15. Transmit Parallel Interface Mode Connections
Receive Clock (CLK)
Receive Data (DO 7-0)
Receive Command (CO 1)
Receive Command Strobe (CSTRB)
Receive Violation (VLTN)
Transmit Clock (CLK)
Transmit Data (DI 7-0)
Transmit Command (CI 1)
Transmit Command (CI 0,2,3)
Transmit Strobe (STRB)
Transmit Clock Input (TXCKI)
Transmit Octet Disable (TXOD)
Transmit Data Output (TXDAT)
Transmit Cell Delineation (TXDELO)
Timing information for TAXI mode is found in
Alternatively, TXOD can be held low and a gapped octet clock provided from
2-15. TXOD and TXDELO are mapped to TXIN and TXOUT[8],
Signal Name from TAXI Chipset
Figure 2-14
Signal Name
Conexant
illustrates the transmit timing for the parallel interface.
TXCKI
TXIN
TXOUT[7:0]
TXOUT[8]
RXCKI
RXIN[7:0]
TXIN
RCV_HLD
RXIN[8]
TXCKI
TXOUT[7:0]
TXOUT[8]
GND
TCLKO
Connect to CN8223 Pin
Table
Section
Connect to CN8223 Pin
2.0 Functional Description
2-14.
2.5 Parallel Line Interface
4.3.5. Pin connections
2-23