cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 61
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cn8223
Manufacturer Part Number
cn8223
Description
Atm Transmitter/receiver With Utopia Interface
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8223.pdf
(161 pages)
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CN8223
ATM Transmitter/Receiver with UTOPIA Interface
Table 2-17. Cell Generation Modes
100046D
48-Octet Mode
52-Octet Mode
53-Octet Mode
57-Octet Mode
2.6.1.1 CELL_GEN_x
Mode
Register
Provides for full ATM generation. Forty-eight octets are taken from the FIFO interface, the appropriate
header fields are attached, and the payload CRC is overwritten to form the ATM cell.
Allows a 53-octet cell, less the HEC octet, to be transferred from the FIFO interface. The HEC is calculated
and inserted by the CN8223. The payload CRC for AAL3/4 can be inserted, or checked and transferred
without modification. Both the HEC and the payload CRC can be optionally disabled or errored on a
single-event basis. The cell generation process also provides HEC coset generation, ATM payload
scrambling. In each of the above modes, any header field can be overwritten with information from
control registers.
Allows entire 53-octet cells to be transferred from the FIFO interface. This is the mode used when Port 0
is configured for UTOPIA.
Allows the input of entire 57-octet PLCP slots from the FIFO interface. Can be used for external PLCP
insertion or test generation purposes.
programmable rate shaping of cell transmission. The ratio of active to idle cells is
programmable with 0.4 % granularity. The cell generation process maintains
status counts of non-idle cells transmitted for each of the four sources.
lists the four cell generation modes provided by the CN8223.
Per-port cell generation registers for FIFO Ports 0–3 are in the four
CELL_GEN_x registers [0x04–0x07]. Cell Generation Mode [bits 1,0] selects the
operating mode for the generation circuit. The four modes described in
are provided. In 52-, 53-, or 57-octet modes, the individual header fields obtained
from the FIFO interface can be overwritten. This overwriting is accomplished
with the values found in the TX_HDR registers for a particular port by setting the
appropriate field insertion control bit in the CELL_GEN_x register. In 48-octet
mode the header fields always come from the programmed value in the
corresponding TX_HDR register.
Table 2-18
Two rate control registers are provided for control of the port sources to allow
The overhead fields of active cells are taken from the locations listed in
or set to the indicated values.
Conexant
Function
2.0 Functional Description
2.6 ATM Cell Processing
Table 2-17
Table 2-17
2-27
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