cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 107

• Manufacturer Part Number: cn8223
• Description: Atm Transmitter/receiver With Utopia Interface
• Manufacturer: Mindspeed Technologies

CN8223
ATM Transmitter/Receiver with UTOPIA Interface
0x15–0x1C—HDR_VALx_12, HDR_VALx_34 (Receive Header Value Register)
The Receive Header Value registers for port x (where x can be 0 to 3) are located at addresses 0x15–0x1C. The
header values direct ATM cells to each port. If an incoming ATM cell header matches the value in the header
register, the cell is directed to that port. Receive Header Mask registers further qualify ATM cell reception.
Table 3-9
Table 3-9. HDR_VALx Register Addresses
HDR_VAL0_12, HDR_VAL1_12, HDR_VAL2_12, HDR_VAL3_12
HDR_VAL0_34, HDR_VAL1_34, HDR_VAL2_34, HDR_VAL3_34
100046D
15–8
7–0
15–8
7–0
Bit
Bit
Address
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
defines the HDR_VALx register addresses.
8
8
Field
Field
Size
Size
8
8
Header Value—Octet 1
Header Value—Octet 2
Header Value—Octet 3
Header Value—Octet 4
Register Name
Name
Name
HDR_VAL0_12
HDR_VAL0_34
HDR_VAL1_12
HDR_VAL1_34
HDR_VAL2_12
HDR_VAL2_34
HDR_VAL3_12
HDR_VAL3_34
Receive Port X ATM Header Match Value—Octet 1
Receive Port X ATM Header Match Value—Octet 2
Receive Port X ATM Header Match Value—Octet 3
Receive Port X ATM Header Match Value—Octet 4
Conexant
Receive Port 0 ATM Header Value—Octets 1, 2
Receive Port 0 ATM Header Value—Octets 3, 4
Receive Port 1 ATM Header Value—Octets 1, 2
Receive Port 1 ATM Header Value—Octets 3, 4
Receive Port 2 ATM Header Value—Octets 1, 2
Receive Port 2 ATM Header Value—Octets 3, 4
Receive Port 3 ATM Header Value—Octets 1, 2
Receive Port 3 ATM Header Value—Octets 3, 4
Description
Description
Description
3.5 Receive Control Registers
3.0 Registers
3-21