cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 114

• Manufacturer Part Number: cn8223
• Description: Atm Transmitter/receiver With Utopia Interface
• Manufacturer: Mindspeed Technologies

3.0 Registers
3.7 Status Register Overview
3.7 Status Register Overview
There are four status registers, as defined in
registers will be cleared when read, or have separate clear functions. The status indications can interrupt the
microprocessor if the corresponding bit is set in an Interrupt Enable Control register
appears on the STAT_INT pin (pin 64).
Table 3-11. ATM Transmitter/Receiver Status Registers, Counters, and Data Link Control
3-28
0x38
0x39
0x3A
0x3B
0x3C
Address
LINE_STATUS
EVENT_STATUS
OVFL_STATUS
CELL_STATUS
RXFEAC_VER
Name
Table
Conexant
3-11. Status registers are read-only. Some of the status
Line Framer/PHY Interrupt Status
Event Interrupt Status—all bits are event driven
Counter Overflow Interrupt Status—all bits are event driven
Cell Counter Interrupt Status—all bits are event driven
Receive FEAC/Part Number/Version Number
ATM Transmitter/Receiver with UTOPIA Interface
Function
(Section
3.6). The interrupt
CN8223
100046D