w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 77

• Manufacturer Part Number: w6692
• Description: Pci Bus Isdn S/t-controller
• Manufacturer: Winbond Electronics Corp America

interrupt, up to 64 or 96 bytes of data can be written into this FIFO for transmission.
8.2.3 B1_ch command register
Value after reset: 00H
RACK
acknowledge the interrupt.
RRST
RACT
XACTB
B1_128K
transparent mode or extended transparent mode and layer 2 B2 channel is not used.
XMS
added to the message by the B1_ch HDLC controller. Zero bit insertion is performed on the data. This bit is also used in
subsequent transmission of the frame.
is added on the data.
This bit is write-only. It's auto-clear.
This bit is read/write. Read operation returns the previously written value.
This bit is read/write. Read operation returns the previously written value.
This bit is write-only. It's auto-clear.
RACK
"1": Both B1 and B2 channels in layer 1 are combined into single layer 2 channel. The layer 2 B1 channel can operates in
When the number of empty locations is equal to or greater than the threshold value, a XFR interrupt is generated. After a XFR
This bit is write only. It's auto-clear.
Setting this bit resets the B1_ch HDLC receiver.
"1": transmitter is active, 64 kHz clock is provided.
"0": transmitter is inactive, clock is LOW to save power.
This bit is read/write. Read operation returns the previously written value.
"0": transmitter is active, 64 kHz clock is provided.
"1": transmitter is inactive, clock is LOW to save power.
"0": Both B1 and B2 channels in layer 1 are not combined.
In transparent mode, setting this bit initiates the transparent transmission of B1_XFIFO data. The opening flag is automatically
In extended transparent mode, settint this bit activates the transmission of B1_XFIFO data. No flag, CRC or zero bit insertion
After a RMR or RME interrupt, the microprocessor reads out the data in B1_RFIFO, it then sets this bit to explicitly
7
Transmit Message Start/Continue
Receiver Reset
Receiver Active
Receive Message Acknowledge
RRST
Transmitter Active
128K Mode
6
RACT XACTB B1_128
5
4
B1_CMDR
K
3
XMS
2
-77 -
XME
1
Read/Write
XRST
0
W6692 PCI ISDN S/T-Controller
Publication Release Date:
Preliminary Data Sheet
Address 88H/22H
Sep 30, 1999
Revision 0.9