w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 15

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w6692

Manufacturer Part Number
w6692
Description
Pci Bus Isdn S/t-controller
Manufacturer
Winbond Electronics Corp America
Datasheet
PME
TOUT2
XINTIN0
XINTIN1
IO0-IO10
XAD7-XAD0
XALE
XRDB
XWRB
VDDD
VDDA
VDDB
VSSD
VSSA
VSSB
60
20
52
53
79,78,77,29,28,
27,26,4,3,2,1
29,28,27,26,
4,3,2,1
77
78
79
17,58,67,83
51
6,32,43,89
16,59,68,82
48
5,31,42,88
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
Power and Ground
Peripheral Control
Power Management Event Signal. Level triggered, active HIGH. Drive
a transistor to PME# in PCI slot.
Timer 2 output. A square wave with 50 % duty cycle, 1~63 ms period
can be generated.
A level change (either direction) will generate a maskable interrupt on
the PCI bus interrupt request pin INTA#.
A level change (either direction) will generate a maskable interrupt on
the PCI bus interrupt request pin INTA#.
When confiured as simple IO mode (PCTL:XMODE = 0), these pins
can read/write data from/to peripheral components. The pin directions
are selected via register.
When configured as microprocessor mode (PCTL:XMODE = 1),
address and data are multiplexed on these pins.
When configured as microprocessor mode (PCTL:XMODE = 1), this is
the Address Latch Enable output.
When configured as microprocessor mode (PCTL:XMODE = 1), this is
the read pulse.
When configured as microprocessor mode (PCTL:XMODE = 1), this is
the write pulse.
Digital Power Supply (5V 5%).
Analog Power Supply (5V 5%).
PCI Bus Power Supply.
Digital Ground.
Analog Ground.
PCI Bus Ground.
-15 -
W6692 PCI ISDN S/T-Controller
Publication Release Date:
Preliminary Data Sheet
Sep 30, 1999
Revision 0.9

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