w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 63

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w6692

Manufacturer Part Number
w6692
Description
Pci Bus Isdn S/t-controller
Manufacturer
Winbond Electronics Corp America
Datasheet
RC3-0
Activation Indication) by user. For example: Siemens PEB2091: AI=1100, Motorola MC145572: AI=1100.
8.1.22 Control Register
Value after reset : 00H
SRST Software Reset
reset pin , except that it does not reset the PCI interface circuit.
This bit is not auto-clear, the software must write "0" to this bit to exit from the reset mode.
write-only.
OPS1-0
8.1.23 Command/Indication Receive Register
Value after reset: 0FH
SCC
cleared via a read of the SQR register.
Note: When SRST = 1, the chip is in reset state. Read or write to any of the registers is inhibited at this time. The SRST bit is
When this bit is set to "1", a software reset signal is activated. The effects of this reset signal are equivalent to the hardware
These two bits select the output phase delay compensation.
OPS1
A change in the received 4-bit S channel has been detected. The new code can be read from the SQR register. This bit is
When GCI bus is being enabled, these four programmable bits are allowed to program different Layer 1_Ready Code (AI:
SCC
7
0
0
0
1
1
7
S Channel Change
Ready Code
Output Phase Delay Compensation Select1-0
OPS0
ICC
6
0
0
1
0
1
6
Effect
No output phase delay compensation
Output phase delay compensation 260ns
Output phase delay compensation 520 ns
Output phase delay compensation 1040 ns
SRST
5
5
CTL Read/Write Address 54H/15H
4
4
CODR3 CODR2 CODR1 CODR0
3
3
2
0
2
-63 -
CIR
OPS1
1
1
Read
OPS0
0
0
W6692 PCI ISDN S/T-Controller
Publication Release Date:
Address 58H/16H
Preliminary Data Sheet
Sep 30, 1999
Revision 0.9

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