w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 72

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w6692

Manufacturer Part Number
w6692
Description
Pci Bus Isdn S/t-controller
Manufacturer
Winbond Electronics Corp America
Datasheet
8.1.37 Monitor Transmit Channel 1
Value after reset: FFH
Contains the Monitor channel data transmitted in GCI Monitor channel 1 according to the Monitor channel protocol.
8.1.38 Monitor Channel 1 Interrupt Register
Value after reset: 00H
MDR1
MER1
MDA1
MAB1
8.1.39 Monitor Channel 1 Control Register
Value after reset: 00H
MRIE1
MRC1
interrupt
MXIE1
MXC1
7
7
7
Monitor channel 1 End of Reception
Monitor channel 1 Data Receive
Monitor channel 1 Data Acknowledged
Monitor channel 1 Data Abort
MR Bit Control
MX bit Control
Monitor Channel 1 Receive Interrupt Enable
Monitor channel 1 Transmit Interrupt Enable
The remote end has acknowledged the Monitor byte being transmitted.
Determines the value of the MR bit:
0: MR bit always 1. In addition, the MDR1 interrupt is blocked, except for the first byte of a packet (if MRE=1).
1: MR internally controlled by the W6692 according to Monitor channel protocol. In addition, the MDR1
Monitor channel interrupt status MDR1, MER1 generation is enabled (1) or masked (0).
Monitor interrupt status MDA1, MAB1 generation is enabled (1) or masked (0).
6
6
6
is enabled for all received bytes according to the Monitor channel protocol (if MRE=1).
5
5
5
4
4
4
MRIE1
MDR1
3
3
3
MER1
MRC1
2
2
2
-72 -
MO1X
MO1I
MO1C
MXIE1
MDA1
1
1
1
Read_clear
Read/Write
MAB1
Read/Write Address 79H/43H
MXC1
W6692 PCI ISDN S/T-Controller
0
0
0
Publication Release Date:
Preliminary Data Sheet
Address 75H/42H
Address 71H/41H
Sep 30, 1999
Revision 0.9

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