w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 40

• Manufacturer Part Number: w6692
• Description: Pci Bus Isdn S/t-controller
• Manufacturer: Winbond Electronics Corp America

7.5 PCM Port
same signals except for the frame synchronization clocks. The frame synchronization clocks (PFCK1-2) are 8 kHz and the bit
synchronization clock (PBCK) is 1.536 MHz. The bit data rate is 64 kbps per port.
7.6 D Channel HDLC Controller
below.
LAPB modulo 8 :
LAPB modulo 128 :
Control field bits
I frame
S frame
U frame
LAPD : modulo 128 only
Control field bits
I frame
There are two PCM ports in W6692. Each PCM port can connect to a PCM codec filter chip. These two PCM ports share the
There are two HDLC protocols that are used for ISDN layer 2 functions : LAPD and LAPB. Their frame formats are shown
Control field bits
I frame
S frame
U frame
(1 octet)
(1 octet)
(1 octet)
flag
flag
flag
address
(1octet)
address
(1octet)
(2 octets)
address
M
X
7
7
(1 or 2 octets)
(1octet)
control
M
control
7
M
X
6
6
(2 octets)
control
N(R)
N(R)
M
M
X
6
5
5
(0 or N octets)
information
N(S)
N(S)
P/F
1st octet
1st octet
X
4
4
M
5
(0 or N octets)
information
M
S
3
3
P/F
P/F
4
P
(0 or N octets)
information
M
S
2
2
M
3
S
(2 octets)
0
1
1
1
-40 -
N(S)
FCS
M
2
S
0
0
1
1
0
0
(2 octets)
1
0
1
FCS
7
7
(1 octet)
flag
(2 octets)
0
0
1
1
FCS
6
6
W6692 PCI ISDN S/T-Controller
(1 octet)
flag
Publication Release Date:
5
5
N(R)
N(R)
N(R)
2nd octet
2nd octet
(1 octet)
4
4
flag
Preliminary Data Sheet
3
3
2
2
1
1
P/F
P/F
Sep 30, 1999
Revision 0.9
P
0
0