w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 57

• Manufacturer Part Number: w6692
• Description: Pci Bus Isdn S/t-controller
• Manufacturer: Winbond Electronics Corp America

D_EXI
B1_EXI
B2_EXI
in D_EXIR register are cleared. B1_EXI bit is cleared by reading B1_EXI register and B2_EXI bit is cleared by reading
B2_EXIR register.
8.1.7 Interrupt Mask Register
Value after reset: FFH
They are internally stored and pending until the mask bits are zero.
respectively.
8.1.8 D_ch Extended Interrupt Register
Value after reset: 00H
RDOV
overwrite the data in the receive FIFO. If RDOV interrupt occurs, software has to reset the receiver and discard the data received.
XDUN
send the inter frame time fill pattern (all 1's) on D channel. The microprocessor must wait until transmit FIFO ready (via XFR
interrupt), re-write data, and issue XMS command to re-transmit the data.
Setting the D_EXI, B1_EXI or B2_EXI bit to "1" masks all the interrupts in D_EXIR, B1_EXIR or B2_EXIR register,
RDOV
D_RMR
Setting the bit to "1" masks the corresponding interrupt source in ISTA register. Masked interrupt status bits are read as zero.
This bit indicates that at least one interrupt bit has been set in D_EXIR register.
This bit indicates that at least one interrupt bit has been set in B1_EXIR register.
This bit indicates that at least one interrupt bit has been set in B2_EXIR register.
Note : A read of the ISTA register clears all bits except D_EXI, B1_EXI and B2_EXI bits. D_EXI bit is cleared when all bits
Frame overflow (too many short frames) or data overflow occurs in the receive FIFO. In data overflow, the incoming data will
This interrupt indicates the D_XFIFO has run out of data. In this case, the W6692 will automatically reset the transmitter and
7
7
Transmit Data Underrun
Receive Data Overflow
D_ch Extended Interrupt
XDUN
B1_ch Extended Interrupt
B2_ch Extended Interrupt
D_RME
6
6
XCOL
5
D_XFR
5
TIN2
4
XINT1
4
IMASK
GCI
3
XINT0
D_EXIR
ISC
3
2
-57 -
R/W Address 18H/06H
T1EXP
D_EXI
1
2
Read_clear
B1_EXI
0
0
1
W6692 PCI ISDN S/T-Controller
Publication Release Date:
Address 1CH
B2_EXI
0
Preliminary Data Sheet
Sep 30, 1999
Revision 0.9