mt90870ag2 Zarlink Semiconductor, mt90870ag2 Datasheet - Page 60

• Manufacturer Part Number: mt90870ag2
• Description: Flexible 12 K Digital Switch F12kdx
• Manufacturer: Zarlink Semiconductor

13.7
Address 0063h to 0082h
Thirty-two Backplane input delay registers (BIDR0 to BIDR31) allow users to program the input bit delay for the
Backplane input data streams BSTi0-31. The possible adjustment is 7 3/4 of the data rate, in steps of 1/4 of the
data rate. The data rate can be either 2 Mb/s, 4 Mb/s, 8 Mb/s, 16 Mb/s, or 32 Mb/s.
The BIDR0 to BIDR31 registers are configured as follows:
13.7.1
These five bits define how long in the cycle the serial interface receiver takes to recognize and stores the bit 0 from
the BSTi input pins: i.e., start assuming a new frame. Input bit delay adjustment can range up to 7
forward with resolution of
This can be described as BIDn(4:0) = (no. of bits delay) / 4
For example, if BID(4:0) is set to 10011 (19), the input bit delay = 19 *
Mode, n = 0 to15 for 32Mb/s Mode)
(where n = 0 to 31 for Non-32Mb/s
Backplane Input Bit Delay Registers (BIDR0 to BIDR31)
Backplane Input Delay Bits 4-0 (BID4 - BID0)
BIDRn Bit
15-5
4-0
Table 24 - Backplane Input Channel Delay (BCD) Programming Table
0 Channel (Default)
Table 25 - Backplane Input Bit Delay Register (BIDRn) Bits
1
Channel Delay
/
4
509 Channels
510 Channels
511 Channels
Input Stream
2 Channels
3 Channels
4 Channels
5 Channels
bit period.
1 Channel
...
...
Reserved
BID(4:0)
Name
Zarlink Semiconductor Inc.
MT90870
Reset
0
0
60
Reserved
Backplane Input Bit Delay Register
The binary value of these bits refers to the input bit
delay value for the Backplane input stream
Corresponding Delay Bits
1
/
4
= 4
BCD8-BCD0
0 0000 0000
0 0000 0001
0 0000 0010
0 0000 0011
0 0000 0100
0 0000 0101
1 1111 1101
1 1111 1110
1 1111 1111
3
/
4.
...
...
Description
Data Sheet
3
/
4
bit periods