mt90870ag2 Zarlink Semiconductor, mt90870ag2 Datasheet - Page 54

• Manufacturer Part Number: mt90870ag2
• Description: Flexible 12 K Digital Switch F12kdx
• Manufacturer: Zarlink Semiconductor

13.2
Address 0001h.
The block programming register stores the bit patterns to be loaded into the connection memories when the
Memory Block Programming feature is enabled. The BPE, LBPD2-0 and BBPD2-0 bits in the BPR register must
be defined in the same write operation.
The BPE bit is set HIGH, to commence the block programming operation. Programming is completed in one frame
period and may be instigated at any time within a frame.The BPE bit returns to LOW to indicate the block
programming function has completed.
When BPE is HIGH, no other bits of the BPR register must be changed for at least a single frame period, except to
abort the programming operation. The programming operation may be aborted by setting either BPE to LOW, or the
Control Register bit, MBP, to LOW.
The BPR register is configured as follows.
Block Programming Register (BPR)
(b)
(a)
Pulse Width = 244 ns,
Control Register B it8 (FPW) = 1
Control Register Bit6 (C8IPOL) = 1
Pulse Width = 122 ns,
Control Register Bit8 (FPW) = 0
Control Register Bit6 (C8IPOL) = 1
FP8i
FP8i
C8i
C8i
Figure 19 - Frame Boundary Conditions, GCI - BUS Operation
Zarlink Semiconductor Inc.
Frame Boundary
MT90870
54
Data Sheet
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