at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 320
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at91cap7e
Manufacturer Part Number
at91cap7e
Description
Customizable Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT91CAP7E.pdf
(520 pages)
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Figure 28-4. SPI Transfer Format (NCPHA = 1, 8 bits per transfer)
Figure 28-5. SPI Transfer Format (NCPHA = 0, 8 bits per transfer)
28.6.3
320
SPCK cycle (for reference)
SPCK cycle (for reference)
(from master)
(from master)
(from slave)
(CPOL = 0)
(CPOL = 1)
(from slave)
(CPOL = 0)
(CPOL = 1)
(to slave)
(to slave)
AT91CAP7E
Master Mode Operations
SPCK
SPCK
MOSI
MISO
SPCK
SPCK
MOSI
MISO
NSS
NSS
* Not defined, but normally MSB of previous character received.
*
When configured in Master Mode, the SPI operates on the clock generated by the internal pro-
grammable baud rate generator. It fully controls the data transfers to and from the slave(s)
* Not defined but normally LSB of previous character transmitted.
MSB
1
1
MSB
MSB
MSB
2
2
6
6
6
6
3
3
5
5
5
5
4
4
4
4
4
4
5
5
3
3
3
3
6
6
6
2
2
2
2
7
7
1
1
1
1
8
8
LSB
LSB
LSB
LSB
8549A–CAP–10/08
*
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