at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 149

• Manufacturer Part Number: at91cap7e
• Description: Customizable Microcontroller
• Manufacturer: ATMEL Corporation

Figure 21-19. Early Read Wait State: NWE-controlled Write with No Hold Followed by a Read with one Set-up Cycle
21.9.3
21.9.3.1
21.9.3.2
8549A–CAP–10/08
Reload User Configuration Wait State
external write controlling signal
internal write controlling signal
User Procedure
Slow Clock Mode Transition
NBS0, NBS1,
NBS2, NBS3,
A0, A1
The user may change any of the configuration parameters by writing the SMC user interface.
When detecting that a new user configuration has been written in the user interface, the SMC
inserts a wait state before starting the next access. The so called “Reload User Configuration
Wait State” is used by the SMC to load the new set of parameters to apply to next accesses.
The Reload Configuration Wait State is not applied in addition to the Chip Select Wait State. If
accesses before and after re-programming the user interface are made to different devices
(Chip Selects), then one single Chip Select Wait State is applied.
On the other hand, if accesses before and after writing the user interface are made to the same
device, a Reload Configuration Wait State is inserted, even if the change does not concern the
current Chip Select.
To insert a Reload Configuration Wait State, the SMC detects a write access to any
SMC_MODE register of the user interface. If the user only modifies timing registers
(SMC_SETUP, SMC_PULSE, SMC_CYCLE registers) in the user interface, he must validate
the modification by writing the SMC_MODE, even if no change was made on the mode
parameters.
A Reload Configuration Wait State is also inserted when the Slow Clock Mode is entered or
exited, after the end of the current transfer (see
D[31:0]
A[25:2]
(NWE)
MCK
NRD
(WRITE_MODE = 1)
write cycle
no hold
Early Read
wait state
read setup = 1
(READ_MODE = 0 or READ_MODE = 1)
“Slow Clock Mode” on page
read cycle
AT91CAP7E
160).
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