at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 2
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at91cap7e
Manufacturer Part Number
at91cap7e
Description
Customizable Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT91CAP7E.pdf
(520 pages)
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1. Description
2
Periodic Interval Timer (PIT)
Watchdog Timer (WDT)
Real-Time Timer (RTT)
Two 32-bit Parallel Input/Output Controllers (PIOA and PIOB)
22 Peripheral DMA Controller Channels (PDC)
Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
Master/Slave Serial Peripheral Interface (SPI)
One Three-channel 16-bit Timer/Counters (TC)
IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
Required Power Supplies:
1.08V to 1.32V for VDDCORE and VDDBU
1.08V to 1.32V for VDDOSC, VDDOSC32, and VDDPLLB
3.0V to 3.6V for VDDPLLA and VDDIO
3.0V to 3.6V for AVDD (ADC)
Package Options: 144 LQFP, 176 LQFP, 208 PQFP, 144 LFBGA, 176TFBGA, 208 TFBGA, 225 LFBGA
– 20-bit interval Timer plus 12-bit interval Counter
– Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow Clock
– 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler
– 32 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os each
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor, Bus Holder and Synchronous Output
– Individual Baud Rate Generator, IrDA
– 8- to 16-bit Programmable Data Length, External Peripheral Chip Select
– Synchronous Communications at up to 80Mbits/sec
– Three External Clock Inputs, Two multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
AT91CAP7E
The AT91CAP7E semi-custom System on a Chip (SoC) is a microcontroller with a special
interface that allows logic in an external FPGA to be mapped directly onto its internal Amba
High-speed Bus (AHB). This FPGA interface includes multiple master and slave channels
providing much greater bus bandwidth for data passing between the microcontroller and an
FPGA than traditional interface methods using general purpose I/O or external memory
interfaces. The AT91CAP7E includes an ARM7TDMI core with the AHB, on-chip ROM, SRAM, a
full-featured system controller, and various general-purpose peripherals accessible via the
Amba Peripheral Bus (APB). It is implemented in a 130 nm CMOS 1.2V process and supports
3.3V I/O.
The AT91CAP7E is built upon Atmel’s AT91CAP7S customizablemicrocontroller with up to 450
Kgates of metal programmable (MP) logic. The FPGA Interface is implemented inthe MP block
and makes use of MP I/O’s available on the AT91CAP7S giving customers not only an efficient,
powerful FPGA interface on a standard microcontroller, but also an excellent platform for
emulating their own AT91CAP7S-based designs.
®
Infrared Modulation/Demodulation, Manchester Encoding/Decoding
8549A–CAP–10/08
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