pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 344

• Manufacturer Part Number: pxf4336
• Description: Abm Premium Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

BYPASS2
PU2
RES2
M2(3:0)
N2(5:0)
Data Sheet
DPLL2 Bypass
Switching between bypass and non-bypass mode is glitch-free with
respect to the internal clock output. The DPLL2 is bypassed after
power-on reset and can be switched to non-bypass mode by
software during device configuration.
0
1
Power Up DPLL2
0
1
Reset DPLL2
0
1
M2 Parameter of DPLL2
This parameter determines the first stage division factor of DPLL2.
The effective division factor is (M2 + 1) in the range 1..16.
N2 Parameter of DPLL2
This parameter determines the second stage multiplication factor of
DPLL2. The effective multiplication factor is (N2 + 1) in the range
1..64.
DPLL2 is internally bypassed,
i.e. DPLL2 clock input connected to DPLL2 clock output
DPLL2 is not bypassed,
i.e. DPLL2 clock output is generated by DPLL2
depending on its parameter configuration
DPLL2 is in power-down mode.
(The analog part of DPLL2 is switched-off for power
saving.)
DPLL2 is in power on (operational) mode.
DPLL2 is in operational mode.
DPLL2 is in reset mode.
Note: The result of Reset Mode is identical to bypass
mode, but switching between reset and non-reset
status is not glitch-free with respect to the internal
clock output.
344
Register Description
PXF 4336 V1.1
2001-12-17
ABM-P