pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 317
pxf4336
Manufacturer Part Number
pxf4336
Description
Abm Premium Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PXF4336.pdf
(425 pages)
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The Read or Write process is controlled by the
LSBs (= Bit 4..0) of the MAR register select the memory/table that will be accessed; to
select the SCTF Upstream table, bit field MAR(4:0) must be set to 17
SCTF Downstream table respectively. Bit 5 of MAR starts the transfer and is
automatically cleared after execution.
Table 7-28
Bit
Bit
SchedSel(6:0)
Data Sheet
unused
15
7
WAR Register Mapping for SCTFU/SCTFD Table access
14
Selects one of the 128 core specific Scheduler Blocks.
6
13
5
12
Unused(9:2)
4
317
SchedSel(6:0)
MAR
11
3
(Memory Address Register). The 5
10
2
Register Description
H
PXF 4336 V1.1
9
1
and 1F
2001-12-17
H
ABM-P
for the
8
0
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