pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 247

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pxf4336

Manufacturer Part Number
pxf4336
Description
Abm Premium Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
Register 40 TCT1
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Register WAR.Word64Sel(1:0) =’00’:
Bit
Bit
BufCiCLP1
(17:10)
Data Sheet
15
7
TCT Transfer Register 1
14
Buffer EPD CLP1 Threshold
This 8-bit value determines a global cell filling level threshold with a
granularity of 1024 cells that triggers early packet discard (EPD) for
CLP=1 tagged frames used by GFR traffic class service (low
watermark).
The threshold values are compared with the non guaranteed Buffer
Occupancy counters UBufferOccNg, DBufferOccNg respectively.
The CPU programs the threshold with a granularity of 1024 cells by
right shifting the value by 10:
BufCiCLP1(17:10):= (threshold_value(17:0) >> 10)
Note: In ABM v1.1 this threshold was determined by registers UEC
6
Read/Write
0000
TCT1
Written and Read by CPU to maintain the TCT table;
the meaning of register TCT1 depends on the bit field
’Word64Sel’ in WAR;
and DEC.
H
13
5
3F
BufCiCLP1(17:10)
H
12
unused(7:0)
4
247
11
3
10
2
Register Description
PXF 4336 V1.1
9
1
2001-12-17
ABM-P
8
0

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