pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 219

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pxf4336

Manufacturer Part Number
pxf4336
Description
Abm Premium Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
7.2.6
Register 20 CONFIG
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
Reserved1
ABRTQ
Data Sheet
Note: The following conditions must apply for proper CI/NI operation:
In Bi-directional Mode, the same LCI and the same queue identifier QID must be
used for the ABR connection in forward and backward directions; for example, in
forward direction LCI=2 and QID=7, in backward direction LCI=2 and QID=7.
In Uni-directional Mode, LCI and QID must have the LSB inverted; for example,
in forward direction LCI=3 and QID=7, in backward direction LCI=2 and QID=6.
The LCI inversion (toggle) is activated by setting the LCI toggle bit in the
register to 1.
(LCI toggling and Queue toggling are not necessary for proper operation of
ABM-P but of preceding devices that expect the same LCI for forward and
backward direction of one connection (e.g. AOP PXB4340 and ALP PXB4350).)
15
7
Configuration Register
Configuration Register
14
6
this bit is for internal use only and must be set to 0 during normal
operation.
ABR Toggle Queue ID:
This global bit controls treatment of RM cells for uni-directional
(miniswitch) mode.
0
1
Read/Write
0000
2B
Written by CPU
H
H
13
5
Unused(5:0)
Normal Operation (set for bi-directional mode).
RM cells with toggled LCI and QID are modified.
12
4
Unused(13:6)
219
11
3
10
2
Register Description
Reserved1 ABRTQ
9
1
PXF 4336 V1.1
2001-12-17
MODE1
ABM-P
8
0

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