pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 309

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pxf4336

Manufacturer Part Number
pxf4336
Description
Abm Premium Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
Register 78 USCTI/DSCTI
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Register SADRx.WSel = 0:
Bit
Bit
IntRate(13:0)
Refer to
for the calculation of IntRate and FracRate
Data Sheet
Note: Recommendation for changing the UTOPIA port number or scheduler rate
Note: Read access to bit field IntRate(13:0) is not supported and will return undefined
during operation:
Disable specific scheduler by read-modify-write operation to corresponding bit in
registers USCEN0/DSCEN0... USCEN7/DSCEN7.
Modify scheduler specific UTOPIA port number and rates via
"Scheduler Configuration Table Integer Transfer Registers" on Page
registers
Fractional Transfer Registers" on Page
Enable specific scheduler by read-modify-write operation to corresponding bit in
registers USCEN0/DSCEN0... USCEN7/DSCEN7.
values.
Section 4.2.2.2 “Programming the Scheduler Block Rates” on Page 138
15
unused(1:0)
7
Upstream/Downstream SCTI Transfer Registers
USCTI/DSCTI
14
Integer Rate
This value determines the integer part of the Scheduler Block output
rate.
6
Read/Write
0000
USCTI
Written by CPU to maintain the SCTI tables
H
13
5
and
A1
H
Table 11 "Scheduler Configuration Table
12
IntRate(7:0)
4
309
316, registers USCTFT/DSCTFT.
IntRate(13:8)
DSCTI
11
3
10
2
B9
Register Description
H
PXF 4336 V1.1
9
1
2001-12-17
Table 10
ABM-P
8
0
306,

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