mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 81

• Manufacturer Part Number: mc68hc908as60
• Description: Mc68hc908as60 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.5 FLASH Charge Pump Frequency Control
5.6 FLASH Erase Operation
MC68HC908AS60 — Rev. 1.0
The internal charge pump, required for program, margin read, and erase
operations, is designed to operate most efficiently with a 2-MHz clock.
The charge pump clock is derived from the bus clock.
how the FDIV bits are used to select a charge pump frequency based on
the bus clock frequency. Program, margin read, and erase operations
cannot be performed if the bus clock frequency is below 2 MHz.
See
times used in this algorithm. Use this step-by-step procedure to erase a
block of FLASH-2 memory:
FDIV1
1. Set the ERASE, BLK0, BLK1, FDIV0, and FDIV1 bits in the
2. Ensure target portion of array is unprotected by reading the block
3. Write to any FLASH address with any data within the block
4. Set the HVEN bit.
5. Wait for a time, t
6. Clear the HVEN bit.
Freescale Semiconductor, Inc.
0
0
1
1
24.13 Memory Characteristics
For More Information On This Product,
FLASH control register. See
Table 5-1
protect register: address $FF81. See
Protection
information.
address range desired.
FDIV0
Go to: www.freescale.com
Table 5-1. Charge Pump Clock Frequency
0
1
0
1
FLASH-2 Memory
for FDIV settings.
and
Pump Clock Frequency
5.9 FLASH Block Protect Register
Erase
Bus frequency
Bus frequency
Bus frequency
Bus frequency
.
Table 5-2
FLASH Charge Pump Frequency Control
for a detailed description of the
1
2
2
4
5.8 FLASH Block
for block sizes and
Bus Clock Frequency
1.8–2.5 MHz
3.6–5.0 MHz
3.6–5.0 MHz
7.2–8.4 MHz
Table 5-1
FLASH-2 Memory
Technical Data
for more
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