mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 264
mc68hc908as60
Manufacturer Part Number
mc68hc908as60
Description
Mc68hc908as60 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908AS60.pdf
(454 pages)
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Serial Peripheral Interface (SPI)
Technical Data
SHIFT REGISTER
GENERATOR
MASTER MCU
BAUD RATE
Figure 18-3. Full-Duplex Master-Slave Connections
Only a master SPI module can initiate transmissions. Software begins
the transmission from a master SPI module by writing to the SPI data
register. If the shift register is empty, the byte immediately transfers to
the shift register, setting the SPI transmitter empty bit, SPTE (SPSCR
$0011). The byte begins shifting out on the MOSI pin under the control
of the serial clock. (See
The SPR1 and SPR0 bits control the baud rate generator and determine
the speed of the shift register. (See
Register.) Through the SPSCK pin, the baud rate generator of the
master also controls the shift register of the slave peripheral.
As the byte shifts out on the MOSI pin of the master, another byte shifts
in from the slave on the master’s MISO pin. The transmission ends when
the receiver full bit, SPRF (SPSCR), becomes set. At the same time that
SPRF becomes set, the byte from the slave transfers to the receive data
register. In normal operation, SPRF signals the end of a transmission.
Software clears SPRF by reading the SPI status and control register and
then reading the SPI data register. Writing to the SPI data register clears
the SPTE bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
MISO
MOSI
SPSCK
SS
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
V
18.8
DD
Interrupts.)
SPSCK
MISO
MOSI
18.14.2 SPI Status and Control
SS
MC68HC908AS60 — Rev. 1.0
SHIFT REGISTER
SLAVE MCU
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