mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 195

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mc68hc908as60

Manufacturer Part Number
mc68hc908as60
Description
Mc68hc908as60 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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13.4.2 Data Format
MC68HC908AS60 — Rev. 1.0
BREAK
$A5
START
BIT
START
START
BIT
BIT
BIT 0
BIT 0
BIT 0
Table 13-2
monitor mode.
Communication with the MON is in standard non-return-to-zero (NRZ)
mark/space data format. (See
The data transmit and receive rate can be anywhere from 4800 baud to
28.8 Kbaud. Transmit and receive baud rates must be identical.
Monitor
1. If the high voltage (V
Modes
BIT 1
Figure 13-3. Sample Monitor Waveforms
User
Freescale Semiconductor, Inc.
its COP enable output. The COP is a mask option enabled or disabled by the COPD bit in
the configuration register. See
BIT 1
BIT 1
For More Information On This Product,
Figure 13-2. Monitor Data Format
BIT 2
Disabled
BIT 2
BIT 2
Enabled
is a summary of the differences between user mode and
Go to: www.freescale.com
COP
BIT 3
Monitor ROM (MON)
BIT 3
BIT 3
(1)
HI
) is removed from the IRQ pin while in monitor mode, the SIM asserts
Table 13-2. Mode Differences
BIT 4
Vector
$FFFE
$FEFE
Reset
BIT 4
BIT 4
High
BIT 5
24.5 5.0 Volt DC Electrical
BIT 5
BIT 5
Vector
$FEFF
$FFFF
Figure 13-2
Reset
Low
BIT 6
BIT 6
BIT 6
Functions
$FEFC
BIT 7
Vector
$FFFC
Break
High
BIT 7
BIT 7
and
STOP
BIT
STOP
STOP
$FEFD
Vector
$FFFD
Break
Figure
Characteristics.
BIT
BIT
Low
START
NEXT
BIT
START
START
Functional Description
NEXT
NEXT
BIT
BIT
Monitor ROM (MON)
13-3.)
$FEFC
Vector
$FFFC
High
SWI
Technical Data
Vector
$FFFD
$FEFD
SWI
Low

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