mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 330

• Manufacturer Part Number: mc68hc908as60
• Description: Mc68hc908as60 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Byte Data Link Controller-Digital (BDLC-D)
21.4 Functional Description
Technical Data
NOTE:
Figure 21-1
interface contains the software addressable registers and provides the
link between the CPU and the buffers. The buffers provide storage for
data received and data to be transmitted onto the J1850 bus. The
protocol handler is responsible for the encoding and decoding of data
bits and special message symbols during transmission and reception.
The multiplex (MUX) interface provides the link between the BDLC
digital section and the analog physical interface. The wave shaping,
driving, and digitizing of data is performed by the physical interface.
Use of the BDLC module in message networking fully implements the
SAE Standard J1850 Class B Data Communication Network Interface
specification.
It is recommended that the reader be familiar with the SAE J1850
document and ISO Serial Communication document prior to proceeding
with this section of the MC68HC908AS60 specification.
Freescale Semiconductor, Inc.
For More Information On This Product,
Byte Data Link Controller-Digital (BDLC-D)
Go to: www.freescale.com
shows the organization of the BDLC module. The CPU
Figure 21-1. BDLC Block Diagram
PHYSICAL INTERFACE
PROTOCOL HANDLER
MUX INTERFACE
CPU INTERFACE
TO J1850 BUS
TO CPU
BDLC
MC68HC908AS60 — Rev. 1.0