mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 390

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mc68hc908as60

Manufacturer Part Number
mc68hc908as60
Description
Mc68hc908as60 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Timer Interface Module A (TIMA-6)
22.5 Interrupts
22.6 Low-Power Modes
22.6.1 Wait Mode
22.6.2 Stop Mode
Technical Data
These TIMA sources can generate interrupt requests:
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
The TIMA remains active after the execution of a WAIT instruction. In
wait mode, the TIMA registers are not accessible by the CPU. Any
enabled CPU interrupt request from the TIMA can bring the MCU out of
wait mode.
If TIMA functions are not required during wait mode, reduce power
consumption by stopping the TIMA before executing the WAIT
instruction.
The TIMA is inactive after the execution of a STOP instruction. The
STOP instruction does not affect register conditions or the state of the
TIMA counter. TIMA operation resumes when the MCU exits stop mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
TIMA overflow flag (TOF) — The TOF bit is set when the TIMA
counter value rolls over to $0000 after matching the value in the
TIMA counter modulo registers. The TIMA overflow interrupt
enable bit, TOIE, enables TIMA overflow CPU interrupt requests.
TOF and TOIE are in the TIMA status and control register.
TIMA channel flags (CH5F–CH0F) — The CHxF bit is set when an
input capture or output compare occurs on channel x. Channel x
TIMA CPU interrupt requests are controlled by the channel x
interrupt enable bit, CHxIE.
Timer Interface Module A (TIMA-6)
Go to: www.freescale.com
MC68HC908AS60 — Rev. 1.0

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