mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 200

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mc68hc908as60

Manufacturer Part Number
mc68hc908as60
Description
Mc68hc908as60 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Monitor ROM (MON)
Technical Data
NOTE:
Do not leave locations $FFF6–$FFFD blank. For security reasons,
program locations $FFF6–$FFFD even if they are not used for vectors.
If FLASH is unprogrammed, the eight security byte values to be sent are
$FF, the unprogrammed state of FLASH.
During monitor mode entry, the MCU waits after the power-on reset for
the host to send the eight security bytes on pin PA0.
If the received bytes match those at locations $FFF6–$FFFD, the host
bypasses the security feature and can read all FLASH locations and
execute code from FLASH. Security remains bypassed until a power-on
reset occurs. After the host bypasses security, any reset other than a
power-on reset requires the host to send another eight bytes. If the reset
was not a power-on reset, the security remains bypassed regardless of
the data that the host sends.
If the received bytes do not match the data at locations $FFF6–$FFFD,
the host fails to bypass the security feature. The MCU remains in monitor
V
RST
PA7
PA0
Notes: 1 = Echo delay (2 bit times)
DD
Freescale Semiconductor, Inc.
For More Information On This Product,
2 = Data return delay (2 bit times)
4 = Wait 1 bit time before sending next byte.
Go to: www.freescale.com
Figure 13-6. Monitor Mode Entry Timing
FROM HOST
Monitor ROM (MON)
FROM MCU
4096 + 32 CGMXCLK CYCLES
24 CGMXCLK CYCLES
1
256 CGMXCLK CYCLES (ONE BIT TIME)
4
1
MC68HC908AS60 — Rev. 1.0
1
2
4
1

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