mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 271

• Manufacturer Part Number: mc68hc908as60
• Description: Mc68hc908as60 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

18.7.1 Overflow Error
MC68HC908AS60 — Rev. 1.0
The overflow flag (OVRF in SPSCR) becomes set if the SPI receive data
register still has unread data from a previous transmission when the
capture strobe of bit 1 of the next transmission occurs. (See
and
transferred to the receive data register so that the unread data can still
be read. Therefore, an overflow error always indicates the loss of data.
OVRF generates a receiver/error CPU interrupt request if the error
interrupt enable bit (ERRIE in SPSCR) is also set. MODF and OVRF can
generate a receiver/error CPU interrupt request. (See
not possible to enable only MODF or OVRF to generate a receiver/error
CPU interrupt request. However, leaving MODFEN low prevents MODF
from being set.
If an end-of-block transmission interrupt was meant to pull the MCU out
of wait, having an overflow condition without overflow interrupts enabled
causes the MCU to hang in wait mode. If the OVRF is enabled to
generate an interrupt, it can pull the MCU out of wait mode instead.
If the CPU SPRF interrupt is enabled and the OVRF interrupt is not,
watch for an overflow condition.
miss an overflow.
READ SPSCR
READ SPDR
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Figure
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OVRF
SPRF
1
2
3
4
Figure 18-7. Missed Read of Overflow Condition
BYTE 1
BYTE 1 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
CPU READS BYTE 1 IN SPDR,
CLEARING SPRF BIT.
BYTE 2 SETS SPRF BIT.
Serial Peripheral Interface (SPI)
18-5.) If an overflow occurs, the data being received is not
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1
2
3
BYTE 2
4
Figure 18-7
5
6
7
8
BYTE 3
5
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
CPU READS BYTE 2 IN SPDR, CLEARING SPRF BIT,
BUT NOT OVRF BIT.
BYTE 4 FAILS TO SET SPRF BIT BECAUSE
OVRF BIT IS SET. BYTE 4 IS LOST.
6
7
shows how it is possible to
Serial Peripheral Interface (SPI)
BYTE 4
Figure
8
Error Conditions
Figure 18-4
Technical Data
18-9.) It is