mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 410

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mc68hc908as60

Manufacturer Part Number
mc68hc908as60
Description
Mc68hc908as60 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Analog-to-Digital Converter (ADC-15)
23.4.2 Voltage Conversion
23.4.3 Conversion Time
Technical Data
NOTE:
NOTE:
that is selected by the ADC. Read of a port pin which is in use by the
ADC will return a logic 0 if the corresponding DDR bit is at logic 0. If the
DDR bit is at logic 1, the value in the port data latch is read.
Do not use ADC channels ATD14 or ATD12 when using the
PTD6/TACLK or PTD4/TBLCK pins as the clock inputs for the 16-bit
timers.
When the input voltage to the ADC equals V
Characteristics), the ADC converts the signal to $FF (full scale). If the
input voltage equals V
between V
input voltages will result in $FF if greater than V
V
Input voltage should not exceed the analog supply voltages.
Conversion starts after a write to the ADSCR (ADC status control
register, $0038), and requires between 16 and 17 ADC clock cycles to
complete. Conversion time in terms of the number of bus cycles is a
function of ADICLK select, CGMXCLK frequency, bus frequency, and
ADIV prescaler bits. For example, with a CGMXCLK frequency of 4
MHz, bus frequency of 8 MHz, and fixed ADC clock frequency of 1 MHz,
one conversion will take between 16 and 17 s and there will be between
128 bus cycles between each conversion. Sample rate is approximately
60 kHz.
Refer to
Number of bus cycles = Conversion time x bus frequency
SSA
Freescale Semiconductor, Inc.
For More Information On This Product,
.
Conversion time =
Analog-to-Digital Converter (ADC-15)
24.7 ADC
REFH
Go to: www.freescale.com
and V
Characteristics.
SSA
SSA,
are a straight-line linear conversion. All other
16 to 17 ADC clock cycles
the ADC converts it to $00. Input voltages
ADC clock frequency
REFH
MC68HC908AS60 — Rev. 1.0
REFH
(see
and $00 if less than
24.7 ADC

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