cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 99

• Manufacturer Part Number: cy8c5588pvi-115es0
• Description: Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
• Manufacturer: Cypress Semiconductor Corporation.

17. Revision History
Document Number: 001-44094 Rev. *J
Description Title: PSoC
Document Number: 001-44094
Rev.
*C
*D
*A
*B
*E
**
ECN No.
2517856
2707147
2759055
2824626
2873520
2611826
®
Submission
5: CY8C55 Family Datasheet Programmable System-on-Chip (PSoC
17/06/08
05/15/09
09/02/09
12/09/09
02/04/10
11/24/08
Date
GDK/MKEA Updates to Electrical Specifications. Renamed CyDesigner as PSoC Creator
Orig. of
Change
MKEA
MKEA
MKEA
PRELIMINARY
DSG
GDK
Updated Part Numbering Conventions. Added Section 11.7.5 (EMIF Figures
Updated I2C section to reflect 1 Mbps. Updated Table 11-6 and 11- 7 (Boost
Changed maximum value of PPOR_TR to '1'. Updated V
New datasheet for new device CY8C55 Family Datasheet.
Reorganized content to be consistent with the TRM
Added section on DAC. Updated Boost Converter section. Updated
Conversion Signals section. Classified Ordering Information according to
CPU speed; added information on security features and ROHS compliance
Added a section on XRES Specifications under Electrical Specification
Updated Analog Subsystem and CY8C55 Architecture block diagrams
Updated Electrical Specifications section
Added Analog Routing section. Content edits
and Tables). Updated GPIO and SIO AC specifications. Updated XRES Pin
Description and Xdata Address Map specifications. Updated DFB and
Comparator specifications. Updated PHUB features section and RTC in
sleep mode. Updated IDAC and VDAC DC and Analog Global Specifications
Updated USBIO AC and Delta Sigma ADC specifications. Updated PPOR
and Voltage Monitors DC specifications. Updated Drive Mode diagram
Updated Analog Comparator and System diagrams
Other edits to electrical specifications
AC and DC specs); also added Shottky Diode specs. Changed current for
sleep/hibernate mode to include SIO; Added footnote to analog global specs.
Updated Figures 1-1, 6-2, 7-14, and 8-1. Updated Table 6-2 and Table 6-3
(Hibernate and Sleep rows) and Power Modes section. Updated GPIO and
SIO AC specifications. Updated Gain error in IDAC and VDAC specifications.
Updated description of V
Current parameter. Moved FILO from ILO DC to AC table.
Added PCB Layout and PCB Schematic diagrams.
Updated Fgpioout spec (Table 11-9). Added duty cycle frequency in PLL AC
spec table. Added note for Sleep and Hibernate modes and Active Mode
specs in Table 11-2. Linked URL in Section 10.3 to PSoC Creator site.
Updated Ja and Jc values in Table 13-1. Updated Single Sample Mode and
Fast FIR Mode sections. Updated Input Resistance specification in Del-Sig
ADC table. Added Tio_init parameter. Updated PGA and UGB AC Specs.
Removed SPC ADC. Updated Boost Converter section.
Added section 'SIO as Comparator'; updated Hysteresis spec (differential
mode) in Table 11-10.
Updated V
Removed reference to Idle mode. CDT 59671: Updated footnotes and ADC
column in ordering information. Removed CSA (Section 8.7). Updated IMO
table and number of UDBs
Updated Figure 8-1 and Figure 6-3. Updated Interrupt Vector table, Updated
Sales links. Updated JTAG and SWD specifications. Removed Jp-p and
Jperiod from ECO AC Spec table. Added note on sleep timer in Table 11-2.
Updated ILO AC and DC specifications. Added Resolution parameter in
VDAC and IDAC tables. Updated I
Changed Temperature Sensor range to -40 °C to +85 °C. Removed Latchup
specification from Table 11-1
BAT
condition and deleted Vstart parameter in Table 11-6.
PSoC
DDA
®
Description of Change
5: CY8C55 Family Datasheet
spec in Table 11-1 and removed GPIO Clamp
OUT
typical and maximum values.
®
)
BIAS
specification.
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