cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 35
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cy8c5588pvi-115es0
Manufacturer Part Number
cy8c5588pvi-115es0
Description
Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY8C5588PVI-115ES0.pdf
(102 pages)
- Current page: 35 of 102
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7.0.0.14 Working Registers
The datapath contains six primary working registers, which are
accessed by CPU firmware or DMA during normal operation.
Table 7-1. Working Datapath Registers
7.0.0.15 Dynamic Datapath Configuration RAM
Dynamic configuration is the ability to change the datapath
function and internal configuration on a cycle-by-cycle basis,
under sequencer control. This is implemented using the 8-word
x 16-bit configuration RAM, which stores eight unique 16-bit wide
configurations. The address input to this RAM controls the
Document Number: 001-44094 Rev. *J
A0 and A1 Accumulators
D0 and D1 Data Registers
F0 and F1 FIFOs
Programmable
Name
Input from
Routing
(To/From Programmable Routing)
Function
Parallel Input/Output
6
Muxes
Input
These are sources and sinks for
the ALU and also sources for the
compares.
These are sources for the ALU
and sources for the compares.
These are the primary interface
to the system bus. They can be a
data source for the data registers
and accumulators or they can
capture data from the accumu-
lators or ALU. Each FIFO is four
bytes deep.
PI
PO
Description
PRELIMINARY
Figure 7-13. Datapath Top Level
PHUB System Bus
Data Registers
Accumulators
FIFOs
Mask
ALU
Shift
D1
D0
A1
A0
F1
F0
R/W Access to All
Registers
sequence, and can be routed from any block connected to the
UDB routing matrix, most typically PLD logic, I/O pins, or from
the outputs of this or other datapath blocks.
ALU
The ALU performs eight general purpose functions. They are:
■
■
■
■
■
■
■
■
Independent of the ALU operation, these functions are available:
■
■
■
■
Increment
Decrement
Add
Subtract
Logical AND
Logical OR
Logical XOR
Pass, used to pass a value through the ALU to the shift register,
mask, or another UDB register
Shift left
Shift right
Nibble swap
Bitwise OR mask
PSoC
®
Datapath
Previous
5: CY8C55 Family Datasheet
To/From
D0
D1
A0
A1
Chaining
Output
Muxes
To/From
Next
Datapath
6
Output to
Programmable
Routing
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