cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 7

• Manufacturer Part Number: cy8c5588pvi-115es0
• Description: Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
• Manufacturer: Cypress Semiconductor Corporation.

Figure 2-4
analog performance on a two-layer board.
■
■
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Document Number: 001-44094 Rev. *J
Notes
5. Pins are No Connect (NC) on devices without USB. NC means that the pin has no electrical connection. The pin can be left floating or tied to a supply voltage or ground.
6. The center pad on the QFN package should be connected to digital ground (V
The two pins labeled V
The two pins labeled V
page
The two pins labeled V
it should be electrically floated and not connected to any other signal.
20. The trace between the two V
and
Figure 2-5 on page 8
(configurable XRES, GPIO) P1[2]
(TRACEDATA[1], GPIO) P2[5]
(TRACEDATA[2], GPIO) P2[6]
(TRACEDATA[3], GPIO) P2[7]
(TCK, SWDCK, GPIO) P1[1]
(TMS, SWDIO, GPIO) P1[0]
(TDO, SWV, GPIO) P1[3]
(I2C0: SDA, SIO) P12[5]
(I2C0: SCL, SIO) P12[4]
(nTRST, GPIO) P1[5]
DDD
CCD
SSD
(TDI, GPIO) P1[4]
(GPIO) P6[4]
(GPIO) P6[5]
(GPIO) P6[6]
(GPIO) P6[7]
(GPIO) P5[0]
(GPIO) P5[1]
(GPIO) P5[2]
(GPIO) P5[3]
must be connected together.
must be connected together.
must be connected together, with capacitance added, as shown in
Vboost
XRES
Vssb
Vssd
Vbat
Ind
show an example schematic and an example PCB layout, for the 100-pin TQFP part, for optimal
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
CCD
1
2
3
4
5
6
7
8
9
pins should be as short as possible.
PRELIMINARY
Lines show Vddio
to I/O supply
association
Figure 2-3. 100-pin TQFP Part Pinout
SSD
TQFP
) for best mechanical, thermal, and electrical performance. If not connected to ground,
PSoC
®
5: CY8C55 Family Datasheet
75
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69
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63
62
61
60
59
58
57
56
55
54
53
52
51
Figure 2-4
Vddio0
P0[3] (GPIO, OpAmp0-/Extref0)
P0[2] (GPIO, OpAmp0+)
P0[1] (GPIO, OpAmp0out)
P0[0] (GPIO, OpAmp2out)
P4[1] (GPIO)
P4[0] (GPIO)
P12[3] (SIO)
P12[2] (SIO)
Vssd
Vdda
Vssa
Vcca
NC
NC
NC
NC
NC
NC
P15[3] (GPIO, kHz XTAL: Xi)
P15[2] (GPIO, kHz XTAL: Xo)
P12[1] (SIO, I2C1: SDA)
P12[0] (SIO, I2C1: SCL)
P3[7] (GPIO, OpAmp3out)
P3[6] (GPIO, OpAmp1out)
and
Power System on
Page 7 of 102
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