cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 95
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cy8c5588pvi-115es0
Manufacturer Part Number
cy8c5588pvi-115es0
Description
Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY8C5588PVI-115ES0.pdf
(102 pages)
- Current page: 95 of 102
- Download datasheet (3Mb)
Document Number: 001-44094 Rev. *J
LASER MARK
PIN 1 DOT
0.08
SEATING PLANE
1.
2. REFERENCE JEDEC#: MO-220
3. PACKAGE WEIGHT: 0.17g
4. ALL DIMENSIONS ARE IN MILLIMETERS
NOTES:
1
7
1
0.20 MAX.
1.60 MAX.
HATCH AREA IS SOLDERABLE EXPOSED METAL.
1
8
6
8
25
1
Figure 13-2. 68-pin QFN 8x8 with 0.4 mm Pitch Package Outline (Sawn Version)
100
26
8.000±0.100
TOP VIEW
Figure 13-3. 100-pin TQFP (14 x 14 x 1.4 mm) Package Outline
16.00±0.25 SQ
14.00±0.05 SQ
5
2
3
4
PRELIMINARY
5
1
3
5
SEE DETAIL
76
50
0.900±0.100
12°±1°
(8X)
75
51
1.40±0.05
A
SIDE VIEW
NOTE:
1. JEDEC STD REF MS-026
2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH
3. DIMENSIONS IN MILLIMETERS
0.50
TYP.
MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE
BODY LENGTH DIMENSIONS ARE MAX PLASTIC BODY SIZE INCLUDING MOLD MISMATCH
STAND-OFF
0.200 REF
PSoC
0.05 MAX
0.15 MAX.
0.05 MIN.
DETAIL
TOP LEFT CORNER CHAMFER
5.7±0.10
®
0.400±0.100
5: CY8C55 Family Datasheet
0.20±0.05
A
3
5
5
1
0.20 MAX.
R 0.08 MIN.
5
2
3
4
0° MIN.
NOTE: PKG. CAN HAVE
SOLDERABLE
EXPOSED
BOTTOM VIEW
0.400 PITCH
6.40 REF
PAD
5.7±0.10
OR
0 0 12.0000
0.60±0.15
0°-7°
4 CORNERS CHAMFER
R 0.08 MIN.
0.20 MAX.
0.25
GAUGE PLANE
6
8
001-09618 *C
1
8
51-85048-*D
1
7
1
Page 95 of 102
PIN1 ID
R 0.20
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