cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 63

• Manufacturer Part Number: cy8c5588pvi-115es0
• Description: Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
• Manufacturer: Cypress Semiconductor Corporation.

11.5 Analog Peripherals
Specifications are valid for –40 °C  T
except where noted.
11.5.1 Opamp
Table 11-17. Opamp DC Specifications
Table 11-18. Opamp AC Specifications
11.5.2 Delta-Sigma ADC
Unless otherwise specified, operating conditions are:
■
■
■
■
■
Table 11-19. 20-bit Delta-sigma ADC DC Specifications
Note
Document Number: 001-44094 Rev. *J
V
V
TCVos
Ge1
V
V
I
I
CMRR
GBW
Tslew
Parameter
Parameter
26. Based on device characterization (Not production tested).
27. Based on device characterization (Not production tested).
28. Total gain error is sum of ADC error, buffer error, and reference accuracy.
Parameter
OUT
OUT
IOFF
IOFF
I
O
Operation in continuous sample mode
fclk = 3.072 MHz for resolution = 16 to 20 bits; fclk = 6.144 MHz for resolution = 8 to 15 bits
Reference = 1.024 internal reference bypassed on P3.2 or P0.3
Operating temperature = 25 °C for typical values
Unless otherwise specified, all charts and graphs show typical values
Input offset voltage
Input offset voltage
Input offset voltage drift with temperature
Gain error, unity gain buffer mode
Quiescent current
Input voltage range
Output voltage range
Output current
Output current
Common mode rejection ratio
Gain BW
Slew rate
Input noise density
Resolution
Number of channels, single ended
Number of channels, differential
Monotonic
ADC gain error, independent of buffer gain Differential range = ±1.024 V (V
Buffer gain error
[26]
[26]
[27]
Description
Description
Description
[28]
[26]
A
 85 °C and T
[26]
PRELIMINARY
J
T = 25 °C
Rload = 1 k
Output load = 1 mA
Output voltage is between V
+500 mV and V
V
Output voltage is between V
+500 mV and V
V
100 mV pk-pk, load capacitance
200 pF
Load capacitance 200 pF
 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
DDA
DDA
–
–
Differential pair is formed using a
pair of GPIOs.
Yes
Gain = 1
> 2.7 V
> 1.7 V and V
Conditions
Conditions
Conditions
DDA
DDA
PSoC
DDA
–500 mV, and
–500 mV, and
< 2.7 V
®
SSA
SSA
5: CY8C55 Family Datasheet
REF
V
)
SSA
Min
V
Min
3
3
–
25
16
70
SSA
–
–
–
–
–
Min
+ 50
8
–
–
–
–
–
Typ
38
TBD
TBD
–
–
Typ
Typ
900
0.5
12
–
–
–
–
–
–
–
–
–
–
–
V
Max
GPIO/2
DDA
No. of
No. of
GPIO
–
–
–
V
TBD
Max
±0.2
Max
0.1
20
DDA
–
2
–
–
–
–
–
–
– 50
Page 63 of 102
nv/sqrtHz
Units
MHz
V/µs
Units
Units
µv/°C
bits
mV
mV
mV
mV
mA
mA
µA
%
%
dB
–
–
–
%
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