cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 101
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cy8c5588pvi-115es0
Manufacturer Part Number
cy8c5588pvi-115es0
Description
Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY8C5588PVI-115ES0.pdf
(102 pages)
- Current page: 101 of 102
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Document Number: 001-44094 Rev. *J
Description Title: PSoC
Document Number: 001-44094
*G
*H
*J
*I
2936486
2944841
2960407
3019464
®
5: CY8C55 Family Datasheet Programmable System-on-Chip (PSoC
05/24/10
6/4/2010
06/24/10
08/31/10
MKEA
MKEA
MKEA
PRELIMINARY
FSU
Replaced V
Added USBIO 22 ohm DP and DM resistors to Simplified Block Diagram
added text in USBIO section of Electrical Specifications.
Added Table 13-2 (Package MSL)
Modified Tstorag condition and changed maximum value to 100
Added bullet (Pass) in ALU (section 7.2.2.2)
Added figures for kHzECO and MHzECO in the External Oscillator section
Updated Figure 6-1(Clocking Subsystem diagram)
Resolved discrepancies with the EROS in Electrical Specifications sections
Updated PSoC Creator Framework image
Updated SIO DC Specifications (V
Updated values in Low power modes bullet on page 1
Updated Figure 8-2
Updated PCB Layout and Schematic, updates as per MTRB review
comments
Updated Table 6-3 (power changed to current)
In 32kHZ EC DC Specifications table, changed I
In IMO DC Specifications table, updated Supply Current values
Updated GPIO DC Specs table
Removed all references to 48-SSOP package
Minor update to post to cypress.com.
Corrected typo in Table 11-3 (V/ms to V/ns) and Tables 11-31 and 11-33 (µA
to mA)
INL max is changed from 16 to 32 in Table 11-20, 20-Bit Delta-Sigma ADC
AC Specifications.
Added to Table 6-6 a footnote and references to same.
Added sentences to the resistive pull up and pull down description bullets.
Added sentence to Section 6.4.11, Adjustable Output Level.
Updated section 5.5 External Memory Interface
Updated Table 11-73 JTAG Interface AC Specifications
Updated Table 11-74 SWD Interface AC Specifications
A footnote, TRACEPORT / TRACECLK max frequency is limited by GPIO
max frequency, is added to the section 11.8.6.
48-SSOP package added.
DDIO
PSoC
with V
DDD
®
in USBIO diagram and specification tables,
5: CY8C55 Family Datasheet
IH
and V
IL
parameters)
®
)
CC
Max to 0.25
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