pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 587

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pnx1700

Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
Figure 3:
Figure 4:
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MBS Horizontal Processing Pipeline
MBS Vertical Processing Pipeline
7 Lines in Total
Deinterlacing
2.2.1 Horizontal Processing Pipeline
2.2.2 Vertical Processing Pipeline
(4:2:2 ->4:4:4)
IFF
Figure 2
pipelines — Vertical processing Pipeline and Horizontal Processing Pipeline — that,
for most applications, can be used in any order; for 3-field majority selection,
however, vertical processing has to be done first.
Figure 3
for chroma up-sampling, horizontal scaling, color-space conversion, and chroma
down-sampling. Note that only one of either horizontal scaling or color-space
conversion can be done at any one time., i.e., these operations are mutually
exclusive. The scaler coefficients are the same for both chroma and luma.
Figure 4
interlacing, EDDI-based post-processing, and vertical scaling (that also allows 4:2:0
<-> 4:2:2 sampling conversions for chroma). De-interlacing for luma samples uses
majority-select or median filtering; de-interlacing for chroma always uses median
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shows the top-level structure of MBS. There are two independent processing
elaborates on the Horizontal Processing Pipeline (HPP). HPP is responsible
shows the Vertical Processing Pipeline (VPP). VPP comprises de-
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Rev. 1 — 17 March 2006
EDDI
Color Space
Conversion
Pipeline or
Horizontal
Scaling
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Chapter 19: Memory Based Scaler
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(4:4:4 ->4:2:2)
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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DFF
PNX17xx Series
<->4:2:2)
Pipeline
Vertical
Scaling
(4:2:0
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19-4

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