pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 107
pnx1700
Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1700.pdf
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Philips Semiconductors
Volume 1 of 1
Table 9: PCI/XIO-16 Bus Interface Unit Capabilities
11. Endian Modes
PNX17XX_SER_1
Preliminary data sheet
External Device
external DRAM
external Motorola
style masters
external 8/16-bit
XIO DMA devices
10.3.3 IDE Drive Interface
Device Type
not supported
not supported
not supported
10.4 10/100 Ethernet MAC
The PNX17xx Series contains an IDE controller that uses some of the PCI pins and a
few sideband signals. Two external TTL devices are all that is required to interface to
an actual IDE cable/drive. The IDE controller capabilities are:
The PNX17xx Series integrates a 10/100 Ethernet MAC sub-layer of the IEEE 802.3
standard enabling an external PHY to be attached through a Reduced Media
Independent Interface (RMII) or a standard Media Independent Interface (MII). It
implements dual transmit descriptor buffers, support for both real-time and non-real-
time traffic and support for quality of service (QoS) using low-priority and a high-
priority transmit queues. Among other features the 10/100 Ethernet MAC module
includes:
The MAC address is programmable into an MMIO register. The MAC address could
be located in an externally attached EEPROM.
PNX17xx Series fully supports little- and big-endian software stacks.
PNX17xx Series always starts in a fixed endian mode which is determined by the
boot script. There is a system provision for TM5250 software to reset and restart the
TM5250 in the opposite endian mode such that a field software Flash upgrade can
release a ‘endian mode opposite boot’ software upgrade.
•
•
•
•
•
•
•
controls attached disks in PIO mode, for a peak data rate of 16.6 MB/s (PIO4)
supports sustained bandwidth of up to 10 MB/s
sends DMA blocks of disk data to and from system DRAM
all IDE registers are accessible to TM5250 software
Wake-on-LAN power management support. This allows system wake-up using
receive filters or a magic packet detection filter.
Receive filtering with perfect address matching, a hash table imperfect filter and 4
pattern match filters.
Memory traffic optimization via buffering and prefetching
Capabilities
not supported on PCI/XIO.
PNX17xx Series PCI/XIO does NOT support external Motorola style masters.
PNX17xx Series assumes that it is always the master over the XIO bus.
not supported. Use one of the streaming DV inputs or outputs instead.
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Chapter 2: Overview
2-26
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