pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 169

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
2.9 Clock Detection
The GPIO interrupt comes from the GPIO block and is the “OR” of all the FIFO and
timestamp registers. This way a GPIO pin can be monitored and when an event
occurs the interrupt to the processor awakes the system. Bit ‘0’ of the
CLK_WAKEUP_CTL enables the GPIO interrupt.
The external signal is the dedicated GPIO pin 15. This signal must be active for at
least one xtal_clk clock period. It is expected that this signal will stay active until the
CPU responds which will be several xtal clock periods. Bit ‘1’ of the
CLK_WAKEUP_CTL enables the external interrupt. GPIO[15] must be low when
entering in power down mode since the wake-up procedure is started when the
GPIO[15] pin is set to high for at least one xtal_clk clock cycle.
Clock detection is required in the case of an external clock being removed or
disconnected e.g if the video cable to the set top box is suddenly removed and an
external video clock thereby stopped. this type of event is detected by the Clock
module. Also the Clock module can detect when the cable is re-connected and a
clock is present again.
These events are flagged by an interrupt which is routed to the TM5250.
The clock detection will be done on the following clocks inputs to PNX17xx Series:
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VDI_CLK1 (clk_vip)
AI_SCK
AO_SCK
VDI_CLK2 (clk_fgpi)
VDO_CLK2 (clk_fgpo)
LAN_RX_CLK
LAN_TX_CLK
VDO_CLK1 (clk_qvcp_out)
Rev. 1 — 17 March 2006
Chapter 5: The Clock Module
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
5-18