dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 560

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

A.8
This section describes how to calculate DSP56K instruction timing manually using the
tables provided. Three complete examples illustrate the “layered’’ nature of the tables.
Alternatively, the user can determine the number of instruction program words and the
number of oscillator clock cycles required for a given instruction by using the DSP56K
simulator. This method of determining instruction timing information is much faster and
much simpler than using the tables. This powerful software package is available for the
IBM
• Table A-6 gives the number of instruction program words and the number of oscillator
• Table A-7 gives the number of additional (if any) instruction words and additional (if
• Table A-8 gives the number of additional (if any) clock cycles for each type of
• Table A-9 gives the number of additional (if any) clock cycles for each type of
• Table A-10 gives the number of additional (if any) clock cycles for each type of bit
• Table A-11 gives the number of additional (if any) clock cycles for each type of jump
• Table A-12 gives the number of additional (if any) clock cycles for the RTI and RTS
• Table A-13 gives the number of additional (if any) instruction words and additional (if
• Table A-14 gives the number of additional (if any) clock cycles for external data,
The number of words per instruction is dependent on the addressing mode and the type
of parallel data bus move operation specified. The symbols used reference subsequent
tables to complete the instruction word count.
The number of oscillator clock cycles per instruction is dependent on many factors,
A - 294
clock cycles for each instruction mnemonic.
any) clock cycles for each type of parallel move operation.
MOVEC operation.
MOVEP operation.
manipulation (BCHG, BCLR, BSET, and BTST) operation.
(Jcc, JCLR, JMP, JScc, JSCLR, JSET, JSR, and JSSET) operation.
instructions.
any) clock cycles for each effective addressing mode.
external program, and external I/O memory accesses.
*IBM is a trademark of International Business Machines.
SUN is a trademark of Sun Microsystems, Inc.
*
INSTRUCTION TIMING
PC and SUN workstation.
Freescale Semiconductor, Inc.
For More Information On This Product,
INSTRUCTION SET DETAILS
INSTRUCTION TIMING
Go to: www.freescale.com
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